From patchwork Mon Feb 24 13:55:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 236758 List-Id: U-Boot discussion From: lukma at denx.de (Lukasz Majewski) Date: Mon, 24 Feb 2020 14:55:24 +0100 Subject: [PATCH 1/3] clk: imx6: Add definition for IMX6QDL_CLK_ENET clock In-Reply-To: <20200224135526.25534-1-lukma@denx.de> References: <20200224135526.25534-1-lukma@denx.de> Message-ID: <20200224135526.25534-2-lukma@denx.de> After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all NXP boards, which are not IMX8 and in the same time are supporting CCF need to provide IMX6QDL_CLK_ENET. This change defines the missing clock in i.MX6Q's CCF. Signed-off-by: Lukasz Majewski --- drivers/clk/imx/clk-imx6q.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index bd0d3e4f47..ace60ecec6 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -182,6 +182,7 @@ static int imx6q_clk_probe(struct udevice *dev) clk_dm(IMX6QDL_CLK_I2C2, imx_clk_gate2("i2c2", "ipg_per", base + 0x70, 8)); + clk_dm(IMX6QDL_CLK_ENET, imx_clk_gate2("enet", "ipg", base + 0x6c, 10)); return 0; }