From patchwork Thu Feb 13 09:34:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 236304 List-Id: U-Boot discussion From: t-kristo at ti.com (Tero Kristo) Date: Thu, 13 Feb 2020 11:34:00 +0200 Subject: [PATCH 4/7] arm: dts: k3-k721e: Add Main domain ESM support In-Reply-To: <20200213093403.25037-1-t-kristo@ti.com> References: <20200213093403.25037-1-t-kristo@ti.com> Message-ID: <20200213093403.25037-5-t-kristo@ti.com> Main domain ESM support is needed to configure main domain watchdogs to generate ESM pin events by default. On J7 processor board these propagate to the PMIC to generate a reset when watchdog expires. Signed-off-by: Tero Kristo --- arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 4 ++++ arch/arm/dts/k3-j721e-main.dtsi | 6 ++++++ arch/arm/dts/k3-j721e.dtsi | 1 + 3 files changed, 11 insertions(+) diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index a3a8193216..158598f5a7 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -349,3 +349,7 @@ &exp2 { u-boot,dm-spl; }; + +&main_esm { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi index 45ac98c47e..ef4282f608 100644 --- a/arch/arm/dts/k3-j721e-main.dtsi +++ b/arch/arm/dts/k3-j721e-main.dtsi @@ -532,4 +532,10 @@ clocks = <&k3_clks 193 0>; power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>; }; + + main_esm: esm at 700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + }; }; diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi index 68ba517e50..e470d3a1b5 100644 --- a/arch/arm/dts/k3-j721e.dtsi +++ b/arch/arm/dts/k3-j721e.dtsi @@ -135,6 +135,7 @@ #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */