From patchwork Thu Feb 6 16:55:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 236034 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Thu, 6 Feb 2020 09:55:05 -0700 Subject: [PATCH v4 17/17] x86: coral: Enable TPM In-Reply-To: <20200206165505.113435-1-sjg@chromium.org> References: <20200206165505.113435-1-sjg@chromium.org> Message-ID: <20200206095419.v4.17.I3433f3152190ba87f47afbe829b9174581054e2a@changeid> Enable TPM2 so that we can use cr50. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v4: - Rebase on latest x86/master Changes in v3: None Changes in v2: - Update the commit message - Add new patches to handle requesting interrupts and interrupt state configs/chromebook_coral_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index b156e837ee..a7b71d99a1 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -53,7 +53,6 @@ CONFIG_CMD_TIME=y CONFIG_CMD_SOUND=y CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_TPM=y -CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -90,6 +89,8 @@ CONFIG_SPI=y CONFIG_ICH_SPI=y CONFIG_TPL_SYSRESET=y CONFIG_TPM_TIS_LPC=y +# CONFIG_TPM_V1 is not set +CONFIG_TPM2_CR50_I2C=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y