From patchwork Wed Feb 5 02:03:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 235974 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Tue, 4 Feb 2020 19:03:17 -0700 Subject: [PATCH v3 06/17] x86: apl: Use the clock driver In-Reply-To: <20200205020328.193225-1-sjg@chromium.org> References: <20200205020328.193225-1-sjg@chromium.org> Message-ID: <20200205020328.193225-7-sjg@chromium.org> Enable the Intel clock driver and modify coral's device tree to use it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: - Move intel-clock.h inclusion to the correct patch arch/x86/cpu/apollolake/Kconfig | 3 +++ arch/x86/dts/chromebook_coral.dts | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index a760e0ac68..6d6e98a589 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -40,6 +40,9 @@ config INTEL_APOLLOLAKE imply INTEL_GPIO imply SMP imply HAVE_ITSS + imply CLK + imply CMD_CLK + imply CLK_INTEL if INTEL_APOLLOLAKE diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index a1820fa187..a4a9e949e6 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -39,6 +39,11 @@ stdout-path = &serial; }; + clk: clock { + compatible = "intel,apl-clk"; + #clock-cells = <1>; + }; + cpus { u-boot,dm-pre-reloc; #address-cells = <1>;