Message ID | 20200129155557.32191-2-yamada.masahiro@socionext.com |
---|---|
State | Accepted |
Commit | 80924cc164c703991a2518feff705fdf5e7fbc14 |
Headers | show |
Series | [v2,1/4] mtd: rawnand: denali_dt: insert udelay() after reset deassert | expand |
On Thu, Jan 30, 2020 at 12:57 AM Masahiro Yamada <yamada.masahiro at socionext.com> wrote: > > Currently, the denali NAND driver in U-Boot configures the > SPARE_AREA_SKIP_BYTES based on the CONFIG option. > > Recently, Linux kernel merged a patch that associates the proper > value for this register with the DT compatible string. > > Do likewise in U-Boot too. > > The denali_spl.c still uses CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES. > > Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com> > --- Applied to u-boot-uniphier. > Changes in v2: None > > drivers/mtd/nand/raw/denali.c | 15 +++++++++++---- > drivers/mtd/nand/raw/denali_dt.c | 16 +++++++++++----- > 2 files changed, 22 insertions(+), 9 deletions(-) > > diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c > index 8537c609fb..be1b3627ad 100644 > --- a/drivers/mtd/nand/raw/denali.c > +++ b/drivers/mtd/nand/raw/denali.c > @@ -1069,11 +1069,18 @@ static void denali_hw_init(struct denali_nand_info *denali) > denali->revision = swab16(ioread32(denali->reg + REVISION)); > > /* > - * tell driver how many bit controller will skip before writing > - * ECC code in OOB. This is normally used for bad block marker > + * Set how many bytes should be skipped before writing data in OOB. > + * If a platform requests a non-zero value, set it to the register. > + * Otherwise, read the value out, expecting it has already been set up > + * by firmware. > */ > - denali->oob_skip_bytes = CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES; > - iowrite32(denali->oob_skip_bytes, denali->reg + SPARE_AREA_SKIP_BYTES); > + if (denali->oob_skip_bytes) > + iowrite32(denali->oob_skip_bytes, > + denali->reg + SPARE_AREA_SKIP_BYTES); > + else > + denali->oob_skip_bytes = ioread32(denali->reg + > + SPARE_AREA_SKIP_BYTES); > + > denali_detect_max_banks(denali); > iowrite32(0x0F, denali->reg + RB_PIN_ENABLED); > iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE); > diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c > index 1afc61f876..587e480faa 100644 > --- a/drivers/mtd/nand/raw/denali_dt.c > +++ b/drivers/mtd/nand/raw/denali_dt.c > @@ -16,6 +16,7 @@ > struct denali_dt_data { > unsigned int revision; > unsigned int caps; > + unsigned int oob_skip_bytes; > const struct nand_ecc_caps *ecc_caps; > }; > > @@ -23,6 +24,7 @@ NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes, > 512, 8, 15); > static const struct denali_dt_data denali_socfpga_data = { > .caps = DENALI_CAP_HW_ECC_FIXUP, > + .oob_skip_bytes = 2, > .ecc_caps = &denali_socfpga_ecc_caps, > }; > > @@ -31,6 +33,7 @@ NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes, > static const struct denali_dt_data denali_uniphier_v5a_data = { > .caps = DENALI_CAP_HW_ECC_FIXUP | > DENALI_CAP_DMA_64BIT, > + .oob_skip_bytes = 8, > .ecc_caps = &denali_uniphier_v5a_ecc_caps, > }; > > @@ -40,6 +43,7 @@ static const struct denali_dt_data denali_uniphier_v5b_data = { > .revision = 0x0501, > .caps = DENALI_CAP_HW_ECC_FIXUP | > DENALI_CAP_DMA_64BIT, > + .oob_skip_bytes = 8, > .ecc_caps = &denali_uniphier_v5b_ecc_caps, > }; > > @@ -69,11 +73,13 @@ static int denali_dt_probe(struct udevice *dev) > int ret; > > data = (void *)dev_get_driver_data(dev); > - if (data) { > - denali->revision = data->revision; > - denali->caps = data->caps; > - denali->ecc_caps = data->ecc_caps; > - } > + if (WARN_ON(!data)) > + return -EINVAL; > + > + denali->revision = data->revision; > + denali->caps = data->caps; > + denali->oob_skip_bytes = data->oob_skip_bytes; > + denali->ecc_caps = data->ecc_caps; > > denali->dev = dev; > > -- > 2.17.1 >
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index 8537c609fb..be1b3627ad 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -1069,11 +1069,18 @@ static void denali_hw_init(struct denali_nand_info *denali) denali->revision = swab16(ioread32(denali->reg + REVISION)); /* - * tell driver how many bit controller will skip before writing - * ECC code in OOB. This is normally used for bad block marker + * Set how many bytes should be skipped before writing data in OOB. + * If a platform requests a non-zero value, set it to the register. + * Otherwise, read the value out, expecting it has already been set up + * by firmware. */ - denali->oob_skip_bytes = CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES; - iowrite32(denali->oob_skip_bytes, denali->reg + SPARE_AREA_SKIP_BYTES); + if (denali->oob_skip_bytes) + iowrite32(denali->oob_skip_bytes, + denali->reg + SPARE_AREA_SKIP_BYTES); + else + denali->oob_skip_bytes = ioread32(denali->reg + + SPARE_AREA_SKIP_BYTES); + denali_detect_max_banks(denali); iowrite32(0x0F, denali->reg + RB_PIN_ENABLED); iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE); diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c index 1afc61f876..587e480faa 100644 --- a/drivers/mtd/nand/raw/denali_dt.c +++ b/drivers/mtd/nand/raw/denali_dt.c @@ -16,6 +16,7 @@ struct denali_dt_data { unsigned int revision; unsigned int caps; + unsigned int oob_skip_bytes; const struct nand_ecc_caps *ecc_caps; }; @@ -23,6 +24,7 @@ NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15); static const struct denali_dt_data denali_socfpga_data = { .caps = DENALI_CAP_HW_ECC_FIXUP, + .oob_skip_bytes = 2, .ecc_caps = &denali_socfpga_ecc_caps, }; @@ -31,6 +33,7 @@ NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes, static const struct denali_dt_data denali_uniphier_v5a_data = { .caps = DENALI_CAP_HW_ECC_FIXUP | DENALI_CAP_DMA_64BIT, + .oob_skip_bytes = 8, .ecc_caps = &denali_uniphier_v5a_ecc_caps, }; @@ -40,6 +43,7 @@ static const struct denali_dt_data denali_uniphier_v5b_data = { .revision = 0x0501, .caps = DENALI_CAP_HW_ECC_FIXUP | DENALI_CAP_DMA_64BIT, + .oob_skip_bytes = 8, .ecc_caps = &denali_uniphier_v5b_ecc_caps, }; @@ -69,11 +73,13 @@ static int denali_dt_probe(struct udevice *dev) int ret; data = (void *)dev_get_driver_data(dev); - if (data) { - denali->revision = data->revision; - denali->caps = data->caps; - denali->ecc_caps = data->ecc_caps; - } + if (WARN_ON(!data)) + return -EINVAL; + + denali->revision = data->revision; + denali->caps = data->caps; + denali->oob_skip_bytes = data->oob_skip_bytes; + denali->ecc_caps = data->ecc_caps; denali->dev = dev;
Currently, the denali NAND driver in U-Boot configures the SPARE_AREA_SKIP_BYTES based on the CONFIG option. Recently, Linux kernel merged a patch that associates the proper value for this register with the DT compatible string. Do likewise in U-Boot too. The denali_spl.c still uses CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES. Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com> --- Changes in v2: None drivers/mtd/nand/raw/denali.c | 15 +++++++++++---- drivers/mtd/nand/raw/denali_dt.c | 16 +++++++++++----- 2 files changed, 22 insertions(+), 9 deletions(-)