From patchwork Mon Jan 27 05:06:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 240225 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Sun, 26 Jan 2020 22:06:21 -0700 Subject: [PATCH 074/108] x86: Add a config for the systemagent PCIEX regions size In-Reply-To: <20200127050655.170614-1-sjg@chromium.org> References: <20200127050655.170614-1-sjg@chromium.org> Message-ID: <20200126220508.74.Ibf6615ca086fcd12272968cb3f86975a5a6cef51@changeid> Add a way to specify the required size for this region. This is used when generating ACPI tables. Signed-off-by: Simon Glass --- arch/x86/Kconfig | 18 ++++++++++++++++++ arch/x86/cpu/apollolake/Kconfig | 1 + 2 files changed, 19 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index af44da1091..5e3357ccee 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -950,4 +950,22 @@ config TPL_ACPI_GPE See https://queue.acm.org/blogposting.cfm?id=18977 for more info +config SA_PCIEX_LENGTH + hex + default 0x10000000 if (PCIEX_LENGTH_256MB) + default 0x8000000 if (PCIEX_LENGTH_128MB) + default 0x4000000 if (PCIEX_LENGTH_64MB) + default 0x10000000 + help + This option allows you to select length of PCIEX region. + +config PCIEX_LENGTH_256MB + bool + +config PCIEX_LENGTH_128MB + bool + +config PCIEX_LENGTH_64MB + bool + endmenu diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index c66863c52e..7d7b5c3a0e 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -13,6 +13,7 @@ config INTEL_APOLLOLAKE select TPL_X86_TSC_TIMER_NATIVE select SPL_PCH_SUPPORT select TPL_PCH_SUPPORT + select PCIEX_LENGTH_256MB select PCH_SUPPORT select P2SB select ACPI_GNVS_EXTERNAL