From patchwork Mon Jan 27 05:06:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 240253 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Sun, 26 Jan 2020 22:06:47 -0700 Subject: [PATCH 100/108] x86: Add a way to add to the e820 memory table In-Reply-To: <20200127050655.170614-1-sjg@chromium.org> References: <20200127050655.170614-1-sjg@chromium.org> Message-ID: <20200126220508.100.I76d2863227979dc3dd80af26759ff2ef51dc5553@changeid> Some boards want to reserve extra regions of memory. Add a 'chosen' property to support this. Signed-off-by: Simon Glass --- arch/x86/lib/fsp/fsp_dram.c | 16 ++++++++++++++++ doc/device-tree-bindings/chosen.txt | 18 ++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 15e82de2fe..ec391e29e7 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -11,6 +11,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -91,6 +92,8 @@ unsigned int install_e820_map(unsigned int max_entries, unsigned int num_entries = 0; const struct hob_header *hdr; struct hob_res_desc *res_desc; + const fdt64_t *prop; + int size; hdr = gd->arch.hob_list; @@ -127,6 +130,19 @@ unsigned int install_e820_map(unsigned int max_entries, entries[num_entries].type = E820_RESERVED; num_entries++; #endif + prop = ofnode_get_chosen_prop("e820-entries", &size); + if (prop) { + int count = size / (sizeof(u64) * 3); + int i; + + if (num_entries + count >= max_entries) + return -ENOSPC; + for (i = 0; i < count; i++, num_entries++, prop += 3) { + entries[num_entries].addr = fdt64_to_cpu(prop[0]); + entries[num_entries].size = fdt64_to_cpu(prop[1]); + entries[num_entries].type = fdt64_to_cpu(prop[2]); + } + } return num_entries; } diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt index d4dfc05847..e5ba6720ce 100644 --- a/doc/device-tree-bindings/chosen.txt +++ b/doc/device-tree-bindings/chosen.txt @@ -143,3 +143,21 @@ This provides the ordering to use when writing device data to the ACPI SSDT node to add. The ACPI information is written in this order. If the ordering does not include all nodes, an error is generated. + +e820-entries +------------ + +This provides a way to add entries to the e820 table which tells the OS about +the memory map. The property contains three sets of 64-bit values: + + address - Start address of region + size - Size of region + flags - Flags (E820_...) + +Example: + +chosen { + e820-entries = /bits/ 64 < + IOMAP_P2SB_BAR IOMAP P2SB_SIZE E820_RESERVED + MCH_BASE_ADDRESS MCH_SIZE E820_RESERVED>; +};