From patchwork Fri Jan 10 21:51:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Marginean X-Patchwork-Id: 239446 List-Id: U-Boot discussion From: alexandru.marginean at nxp.com (Alex Marginean) Date: Fri, 10 Jan 2020 23:51:32 +0200 Subject: [PATCH v2] armv8: ls1028a_serdes: add a few missing serdes protocols to supported list Message-ID: <20200110215132.2592-1-alexandru.marginean@nxp.com> These protocols are supported and functional but they trigger a warning in U-Boot console at boot because they are not on this list. Signed-off-by: Alex Marginean --- Changes in v2: - added one more, 65bb - changed subject This patch replaces v1: https://patchwork.ozlabs.org/patch/1220248/ arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c index 313f3f1e8a..80d2910f67 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -35,6 +35,10 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} }, {0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} }, {0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} }, + {0x7777, {SGMII1, SGMII2, SGMII3, SGMII4} }, + {0x9999, {SGMII1, SGMII2, SGMII3, SGMII4} }, + {0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} }, + {0xbb56, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} }, {} };