From patchwork Fri Jan 10 07:35:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Wallner X-Patchwork-Id: 239371 List-Id: U-Boot discussion From: wolfgang.wallner at br-automation.com (Wolfgang Wallner) Date: Fri, 10 Jan 2020 08:35:13 +0100 Subject: [PATCH 3/3] gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value() In-Reply-To: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> References: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> Message-ID: <20200110073513.19472-4-wolfgang.wallner@br-automation.com> Fix the following in intel_gpio_get_value(): * The value of the register is contained in the variable 'reg', not in 'mode'. The variable 'mode' contains only the configuration whether the gpio is currently an input or an output. * The correct bitmasks for the input and output value are PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE. Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and PAD_CFG0_TX_STATE_BIT. Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass --- drivers/gpio/intel_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index ec1a315ae2..ef47b92ca4 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -59,9 +59,9 @@ static int intel_gpio_get_value(struct udevice *dev, uint offset) if (!mode) { rx_tx = reg & (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE); if (rx_tx == PAD_CFG0_TX_DISABLE) - return mode & PAD_CFG0_RX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_RX_STATE ? 1 : 0; else if (rx_tx == PAD_CFG0_RX_DISABLE) - return mode & PAD_CFG0_TX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_TX_STATE ? 1 : 0; } return 0;