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[81.169.180.215]) by mx.google.com with ESMTP id g18-v6si5896268eja.148.2018.12.20.05.08.18; Thu, 20 Dec 2018 05:08:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=AHUZfCuQ; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id 43F50C21F00; Thu, 20 Dec 2018 13:07:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0E677C21F2B; Thu, 20 Dec 2018 13:07:40 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 49AF5C21F5B; Thu, 20 Dec 2018 13:07:27 +0000 (UTC) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by lists.denx.de (Postfix) with ESMTPS id 52DBDC21F2F for ; Thu, 20 Dec 2018 13:07:23 +0000 (UTC) Received: by mail-pf1-f195.google.com with SMTP id q1so912671pfi.5 for ; Thu, 20 Dec 2018 05:07:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0xe6RRBqLDiBZ0bG6QHN5OQYNUybFJx6oSADw5mNqdo=; b=AHUZfCuQRTmw6FVmNxvbiUSEXwytIUHOo1qlGMLLY/lPN1TYaLqewTZ3KMHgDYLI8M eqoRQf64Qf5AH903lwCgwR1uL2cFRCD9yoeP8DA3q9CN6oxs3wIDVKOiTMVJomd/WSmw wzhqT56kfqEaSTt6is/717Omh8y8qlv2++W64= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0xe6RRBqLDiBZ0bG6QHN5OQYNUybFJx6oSADw5mNqdo=; b=n4twX3XR8kQHcVQgFxZmbUIGAEGoLVtlFt/+vXDmKYv4TkKCfR/RRto59Azr/MgIX/ cVz+SXqne+Brl9AV/8wQd/lIu6QG835mAe1Rjn8m0is76ZyUz7/tBVdQ/057EJOhD/i3 D1CH3cgSHAUijoEIOsU7uKUAPf9zicl7ASS6y7xG/Sm/1ZDd7OovK6b0nBFUTEP4vJwq RFoXdYw5TEskQPd0F6+fMQ0UWopSY2NJtB2G4r45ib87fW45NS3Iy4uD1B4LoIvoVfhp XJZl36trH1Y2zYLyCz3T/pLoR6579YFs2MbmnrBwXYDCQZDpMUDUer+1XYw8BTJ7hNVy TyLQ== X-Gm-Message-State: AA+aEWbYiUXRDDyJwsBwpU+TDY/tA1/xf/aYIrgJnI447OY4pLEKphb7 8U47/l1yBSVml35G6XTfHUMf X-Received: by 2002:a63:1e17:: with SMTP id e23mr22804237pge.130.1545311241841; Thu, 20 Dec 2018 05:07:21 -0800 (PST) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id q195sm23652441pgq.7.2018.12.20.05.07.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 20 Dec 2018 05:07:21 -0800 (PST) From: Manivannan Sadhasivam To: jh80.chung@samsung.com, albert.u.boot@aribaud.net, sjg@chromium.org Date: Thu, 20 Dec 2018 18:37:02 +0530 Message-Id: <20181220130702.23257-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181220130702.23257-1-manivannan.sadhasivam@linaro.org> References: <20181220130702.23257-1-manivannan.sadhasivam@linaro.org> Cc: u-boot@lists.denx.de, Manivannan Sadhasivam Subject: [U-Boot] [PATCH 3/3] arm: dts: Add MMC nodes for HiKey board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add MMC nodes for HiKey board based on HI6220 SoC. There are two MMC controllers in this SoC, first one used for eMMC and second one used for SD card. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Simon Glass --- arch/arm/dts/hi6220-hikey.dts | 13 +++++++++++++ arch/arm/dts/hi6220.dtsi | 18 ++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/arch/arm/dts/hi6220-hikey.dts b/arch/arm/dts/hi6220-hikey.dts index 24f09257af..9c8f2467dc 100644 --- a/arch/arm/dts/hi6220-hikey.dts +++ b/arch/arm/dts/hi6220-hikey.dts @@ -40,6 +40,19 @@ }; }; +&mmc0 { + u-boot,dm-pre-reloc; + status = "okay"; + non-removable; + bus-width = <8>; +}; + +&mmc1 { + u-boot,dm-pre-reloc; + status = "okay"; + bus-width = <4>; +}; + &uart2 { label = "LS-UART0"; }; diff --git a/arch/arm/dts/hi6220.dtsi b/arch/arm/dts/hi6220.dtsi index a610ccb634..501c8906fd 100644 --- a/arch/arm/dts/hi6220.dtsi +++ b/arch/arm/dts/hi6220.dtsi @@ -162,6 +162,24 @@ #clock-cells = <1>; }; + mmc0: dwmmc@f723d000 { + compatible = "hisilicon,hi6220-dw-mshc"; + reg = <0x0 0xf723d000 0x0 0x1000>; + interrupts = <0x0 0x48 0x4>; + clocks = <&sys_ctrl 2>, <&sys_ctrl 1>; + clock-names = "ciu", "biu"; + status = "disabled"; + }; + + mmc1: dwmmc@f723e000 { + compatible = "hisilicon,hi6220-dw-mshc"; + reg = <0x0 0xf723e000 0x0 0x1000>; + interrupts = <0x0 0x49 0x4>; + clocks = <&sys_ctrl 4>, <&sys_ctrl 3>; + clock-names = "ciu", "biu"; + status = "disabled"; + }; + uart0: uart@f8015000 { /* console */ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>;