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[81.169.180.215]) by mx.google.com with ESMTP id f10si1071638edy.56.2018.10.26.22.11.27; Fri, 26 Oct 2018 22:11:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 6F6E2C21DA6; Sat, 27 Oct 2018 05:11:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D8609C21C2F; Sat, 27 Oct 2018 05:11:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 77BEEC21C2F; Sat, 27 Oct 2018 05:11:20 +0000 (UTC) Received: from gorilla.birch.relay.mailchannels.net (gorilla.birch.relay.mailchannels.net [23.83.209.75]) by lists.denx.de (Postfix) with ESMTPS id 8C4C9C21C29 for ; Sat, 27 Oct 2018 05:11:19 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 68BD13E1791; Sat, 27 Oct 2018 05:11:17 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.36.160]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id 6BF823E1199; Sat, 27 Oct 2018 05:11:16 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [199.195.250.187]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.16.2); Sat, 27 Oct 2018 05:11:17 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Broad-Slimy: 04f69e7f27daf205_1540617077218_2622924037 X-MC-Loop-Signature: 1540617077218:656323595 X-MC-Ingress-Time: 1540617077217 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id A1250BFCBC; Sat, 27 Oct 2018 05:11:12 +0000 (UTC) From: Icenowy Zheng To: Jagan Teki , Maxime Ripard , Chen-Yu Tsai , Jun Nie Date: Sat, 27 Oct 2018 13:11:00 +0800 Message-Id: <20181027051100.59649-1-icenowy@aosc.io> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH v4] sunxi: add support for Banana Pi M2 Zero board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jun Nie Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one powering-only) and a miniHDMI port. Signed-off-by: Icenowy Zheng Signed-off-by: Jun Nie Acked-by: Maxime Ripard --- Changes in v4: - Fixed MMC card detect on product batch boards. - Synced the device tree from the same commit with other H3/H2+ DTs. arch/arm/dts/Makefile | 1 + .../dts/sun8i-h2-plus-bananapi-m2-zero.dts | 121 ++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/bananapi_m2_zero_defconfig | 13 ++ 4 files changed, 140 insertions(+) create mode 100644 arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts create mode 100644 configs/bananapi_m2_zero_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0de6234eec..c2de60e031 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -365,6 +365,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dts dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h2-plus-bananapi-m2-zero.dtb \ sun8i-h2-plus-libretech-all-h3-cc.dtb \ sun8i-h2-plus-orangepi-r1.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts new file mode 100644 index 0000000000..7d01f93226 --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2017 Icenowy Zheng + * + * Based on sun8i-h3-bananapi-m2-plus.dts, which is: + * Copyright (C) 2016 Chen-Yu Tsai + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include + +/ { + model = "Banana Pi BPI-M2-Zero"; + compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + + pwr_led { + label = "bananapi-m2-zero:red:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ + default-state = "on"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + sw4 { + label = "power"; + linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ + }; +}; + +&ehci0 { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + /* + * On the production batch of this board the card detect GPIO is + * high active (card inserted), although on the early samples it's + * low active. + */ + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + status = "okay"; +}; + +&mmc1 { + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + /* + * There're two micro-USB connectors, one is power-only and another is + * OTG. The Vbus of these two connectors are connected together, so + * the external USB device will be powered just by the power input + * from the power-only USB port. + */ + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 2f95976445..390b119003 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -402,6 +402,11 @@ M: Icenowy Zheng S: Maintained F: configs/Sinovoip_BPI_M2_Plus_defconfig +SINOVOIP BPI M2 ZERO BOARD +M: Icenowy Zheng +S: Maintained +F: configs/Sinovoip_BPI_M2_Zero_defconfig + SINOVOIP BPI M3 A83T BOARD M: VishnuPatekar S: Maintained diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig new file mode 100644 index 0000000000..91302eb49c --- /dev/null +++ b/configs/bananapi_m2_zero_defconfig @@ -0,0 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_MMC0_CD_PIN="" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero"