From patchwork Wed Apr 25 07:43:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 134238 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp534356lji; Wed, 25 Apr 2018 00:44:01 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/oXD4rxt+aqsbyKovNNvnyGFZydc9PCJmPdUJImOqRI//P+lcmGaD/T7caLv2INmjBPkyd X-Received: by 10.80.205.69 with SMTP id d5mr36597542edj.118.1524642241182; Wed, 25 Apr 2018 00:44:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524642241; cv=none; d=google.com; s=arc-20160816; b=gIb7CkF2YJnbWki6HMSJMMNr0VjvmFnEOzIr3rhUqOsbZq7AQt8Tum44YwDNv18Un1 HkeYSn9769NJSDMeBAMW2YAvgzZMtDiDEtyesXZoJeHoNzVj/biPumabwFHLtst93tb4 K5IfNlC1Jzb84tqKXtx8MsGTd5X5lZlPPOlGUm/1mMPb0GJtoppGCjA9y61vtoQQ/HAY Slw+N6ytqWQvee0b9y4i/AbrrjlOvXvbJJ7GWFzCAsR23cXeIDj/xs5LKYYzXcUVjQ9i 1oO8qHc77nN4oiNBG/hfNbG9DpDUEbYc3WOvN4gSlerDsfISkqh8VR7fVTdrec+diQiG FjIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:message-id:date:to:from :arc-authentication-results; bh=u8c2TQLHnY39HuaCvsL7yEgbtCFFdQwpmZdusLARU+4=; b=SP1kN5aKgGu+lRYB0x12lyHfUOKOV9YgZ96uKR+KNkA7twXYorI1gTIr86BxaQ777j 6uwmHnTKmLd38P9d71MDHn0WRUVXPWxG6g7R7gIV9bE2tthtuqtKpI9fWIcVj2YFs7ES ArMZctKWYPhtKFI6QXRqMUxrwHjJSyXbQAMRlEai4sc6H9YlSdKrSGOng1Pxd59BJNBm H0sM4ANCFKEXofDHuZ/wv1ScBYNtN1IKW68vB/MM6KJpSaByXg16niS1oU3628Uil32s 5m/7q0IRui6CfOfo7dAC9SDf2t2wDO5N7sIhdX5JselC0XQ4YgwP6RZbdi3ZGKw1unBe Wnlg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id i7si3365795edg.65.2018.04.25.00.44.00; Wed, 25 Apr 2018 00:44:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id BA02BC21F35; Wed, 25 Apr 2018 07:43:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E4F17C21E75; Wed, 25 Apr 2018 07:43:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0CB99C21E75; Wed, 25 Apr 2018 07:43:54 +0000 (UTC) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id AC26DC21E13 for ; Wed, 25 Apr 2018 07:43:53 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 66118ABF9; Wed, 25 Apr 2018 07:43:53 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Wed, 25 Apr 2018 09:43:52 +0200 Message-Id: <20180425074352.57148-1-agraf@suse.de> X-Mailer: git-send-email 2.12.3 Cc: Michal Simek Subject: [U-Boot] [PATCH v4] zynqmp: Add generic target X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" I would like to create a generic U-Boot build that adapts itself completely based on the DT passed in. That way we can potentially support running random board configurations with a single U-Boot binary built as part of the distribution. Currently a few things are still missing to make it a full reality. The most obvious one I think is the EEPROM location. This would need to also move into something described by DT. Apart from that, we're almost there. This patch adds a defconfig that simply contains all drivers we could make use of. We can then enable individual boards along the way and slowly adapt everything to be fully DT described while we identify each missing bit. Signed-off-by: Alexander Graf --- v1 -> v2: - Remove debug uart v2 -> v3 - show model information instead of custom IDENT_STRING v3 -> v4: - reintroduce CONFIG_IDENT_STRING - remove CONFIG_DEFAULT_DEVICE_TREE - run through savedefconfig - replace CONFIG_SYS_I2C_ZYNQ with CONFIG_SYS_I2C_CADENCE - remove CONFIG_ZYNQ_SDHCI{0,1} - needs to be solved generically - add xhci usb1 to xhci controller list --- configs/xilinx_zynqmp_generic_defconfig | 86 +++++++++++++++++++++++++++++++++ include/configs/xilinx_zynqmp_generic.h | 21 ++++++++ 2 files changed, 107 insertions(+) create mode 100644 configs/xilinx_zynqmp_generic_defconfig create mode 100644 include/configs/xilinx_zynqmp_generic.h diff --git a/configs/xilinx_zynqmp_generic_defconfig b/configs/xilinx_zynqmp_generic_defconfig new file mode 100644 index 0000000000..ea2be0c9cc --- /dev/null +++ b/configs/xilinx_zynqmp_generic_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_generic" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP based platform" +CONFIG_ZYNQMP_USB=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SYS_PROMPT="ZynqMP> " +CONFIG_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_BOARD=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_CMD_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ZYNQ_GEM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_FUNCTION_THOR=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/xilinx_zynqmp_generic.h b/include/configs/xilinx_zynqmp_generic.h new file mode 100644 index 0000000000..5e3a1240c6 --- /dev/null +++ b/include/configs/xilinx_zynqmp_generic.h @@ -0,0 +1,21 @@ +/* + * Configuration for the Xilinx ZynqMP generic platform + * + * (C) Copyright 2018 Alexander Graf + * (C) Copyright 2015 Xilinx, Inc. + * Michal Simek + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_GENERIC_H +#define __CONFIG_ZYNQMP_GENERIC_H + +/* This file should disappear as soon as xhci is converted to DT enumerated */ + +#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ + ZYNQMP_USB1_XHCI_BASEADDR} + +#include + +#endif /* __CONFIG_ZYNQMP_GENERIC_H */