From patchwork Tue Apr 24 19:28:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 134191 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp2618670lji; Tue, 24 Apr 2018 12:28:56 -0700 (PDT) X-Google-Smtp-Source: AIpwx4822kbvxVoLbCzM8HDmCG380EI+zRGZJQilx/2hCwnM+7hVsP05lu3w+A55piA8+6GGq1UD X-Received: by 10.80.177.25 with SMTP id k25mr35558189edd.217.1524598136573; Tue, 24 Apr 2018 12:28:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524598136; cv=none; d=google.com; s=arc-20160816; b=cXC7OMXEGTo3RRYKd31DYcK+T4Oak+f6qxtVGlMdDK3m6CzCCJZ9+5a2PHIsxNO48f 95H/NmA6wu0jCDWcZ7HviMgbB3V/Fc7VmdFzDFqtaHXfh7ZRj4gjAiTt+JoZ4EV052ay USFMmf5OUfOLGTHpyaUVxsb5CsqPMfGY8seorOXs3o7tKr1fJzW6b7GqnzsRXHu4Q5sc 4B2iHd+cw4Ad9PI9vA7li+7+NKVyGek/r++ROcPuNTgnv4VMdEQFHxAHT7KtzG/vKTTT cbX0xQn+b7CWcljP3Tdea+eCVWtcP+MoyVPDpCdCRwk8vbLXndXihOTBXPG4DtACQErH lkYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:message-id:date:to:from :arc-authentication-results; bh=Q8gOpVQK88TrOWB+J9OTkrTqqKV2T50Sjs8kK6zRF3s=; b=zSyIRr5SFCQnpb16Po6C3T25hPmjWckj70htFBnrz6Ai19GBMqNWsx9a8XPx1aQFCl eOKtfQwd3zcC9RoFj59d84xiO8pXNtlROtxSXFEwl6wvECfGQpaulyVcLvCFnm9Gosfn taWVR6NuqQ3l15bkQ/xbiPISI5RhDN48WaCi+AuYXJdYoInqot0F11sxI/nVahsrYLyh VCkMGnf4DQQzLo3NfnZ3p6CFVyFTfeD0M2nN17vs5ZaPsY/9M6vhmn2KrouvOFjdu23J selq5b2DpheSErgn+9Nfz1r4Qua4+sILWbi7CZmdP8y1txb++edQEvhvMCwslfHkq6lL OKCg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id b15si840957edb.104.2018.04.24.12.28.56; Tue, 24 Apr 2018 12:28:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 1AE02C21F3C; Tue, 24 Apr 2018 19:28:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8C54BC21E42; Tue, 24 Apr 2018 19:28:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D8DE1C21E42; Tue, 24 Apr 2018 19:28:48 +0000 (UTC) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id 7031AC21E13 for ; Tue, 24 Apr 2018 19:28:48 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id C1C84AD45; Tue, 24 Apr 2018 19:28:47 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Tue, 24 Apr 2018 21:28:46 +0200 Message-Id: <20180424192846.36333-1-agraf@suse.de> X-Mailer: git-send-email 2.12.3 Cc: Michal Simek Subject: [U-Boot] [PATCH] zynqmp: Add generic target X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" I would like to create a generic U-Boot build that adapts itself completely based on the DT passed in. That way we can potentially support running random board configurations with a single U-Boot binary built as part of the distribution. Currently a few things are still missing to make it a full reality. The most obvious one I think is the EEPROM location. This would need to also move into something described by DT. Apart from that, we're almost there. This patch adds a defconfig that simply contains all drivers we could make use of. We can then enable individual boards along the way and slowly adapt everything to be fully DT described while we identify each missing bit. Signed-off-by: Alexander Graf --- configs/xilinx_zynqmp_generic_defconfig | 97 +++++++++++++++++++++++++++++++++ include/configs/xilinx_zynqmp_generic.h | 23 ++++++++ 2 files changed, 120 insertions(+) create mode 100644 configs/xilinx_zynqmp_generic_defconfig create mode 100644 include/configs/xilinx_zynqmp_generic.h diff --git a/configs/xilinx_zynqmp_generic_defconfig b/configs/xilinx_zynqmp_generic_defconfig new file mode 100644 index 0000000000..afbf6ad0af --- /dev/null +++ b/configs/xilinx_zynqmp_generic_defconfig @@ -0,0 +1,97 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_generic" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP based platform" +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc" +CONFIG_ZYNQMP_USB=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_ATF=y +CONFIG_SYS_PROMPT="ZynqMP> " +CONFIG_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_BOARD=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_CMD_PCA953X=y +CONFIG_SYS_I2C_ZYNQ=y +CONFIG_ZYNQ_I2C0=y +CONFIG_ZYNQ_I2C1=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ZYNQ_GEM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_FUNCTION_THOR=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/xilinx_zynqmp_generic.h b/include/configs/xilinx_zynqmp_generic.h new file mode 100644 index 0000000000..56bd5bd6f1 --- /dev/null +++ b/include/configs/xilinx_zynqmp_generic.h @@ -0,0 +1,23 @@ +/* + * Configuration for the Xilinx ZynqMP generic platform + * + * (C) Copyright 2018 Alexander Graf + * (C) Copyright 2015 Xilinx, Inc. + * Michal Simek + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_GENERIC_H +#define __CONFIG_ZYNQMP_GENERIC_H + +/* All of these should be enumerated using DT instead ... */ + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_SDHCI1 + +#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} + +#include + +#endif /* __CONFIG_ZYNQMP_GENERIC_H */