From patchwork Thu Jan 25 11:05:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 125812 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp1039656ljf; Thu, 25 Jan 2018 03:16:24 -0800 (PST) X-Google-Smtp-Source: AH8x22721YY/SgAE/uQz67CVIztXkqM3usp/bt1/hpjsoTZZyu1bZQH4TbjgqfUaa9PpvQohRTOD X-Received: by 10.80.224.195 with SMTP id j3mr28527499edl.50.1516878984438; Thu, 25 Jan 2018 03:16:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516878984; cv=none; d=google.com; s=arc-20160816; b=GegkRkHBhEZqHCy8VZMDxEi2Vp1T+3N+oSjpbdJfO0rvME/e/BwpW/T3FFsc3QyITX zIGW8MjzhzJLvfXEitpINa3IU49JLueg5/kpkdxMpOQ6JH2Bnv+6v5aje/yP2gZn6MmA LX+CD6uaFwTV+O+H+i4O678M+t8P+ON0sWOgQrc7GA6g82SRYXNIFLQ3IvOU//nCZOME O9lwzg0UHamnIDUU/nlCgau+pfaejKJnKKm+PWWWfvcn4etXfZE5/F0Wz0p3JcOSzZIc Hs8OtBaW0Lb/crBYXiyuRWmIYsdrmlNzNPuUedr3pPND2XHjACid3ukLKm9rP0ii+ZPk H/yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:arc-authentication-results; bh=CBCBm+/UtQkQw3nZg3TeO/Ek/y4TWkTuFSg1bnPUIPU=; b=puvE0VuPeS6qWF1vwxa/25tRlR78DXcNr4tjylYKKrixZj5G7QcY2qq3NrhHpEms/C 5hJbIavoYvK0WMytwRPCyRRFGfp7oT4l4cPHBb+W/+sh8FAmqFyBxIqWb1OcseIiXyll xUp8A4Websp6tI3qo5OKOSXIunO5lPltLm9OT+d5axQN6obo/YGdSRsvXa9ssFulgoRY EMgquA+HFl71tkZgAZpXe4BBrvWFX0H3T9bb2e69uDGVB+HVjCQsbm+Hc1+7LL3wtirh Hooa1znrwdOA8k1WncpPkf7fC4PewQfki12hraiUE8DixRMDqUaBvTkJaPEvPyewQQI6 0lBw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id q11si1254329edj.326.2018.01.25.03.16.24; Thu, 25 Jan 2018 03:16:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 14E98C22412; Thu, 25 Jan 2018 11:11:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9B0A6C22412; Thu, 25 Jan 2018 11:11:23 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 70780C223F1; Thu, 25 Jan 2018 11:05:58 +0000 (UTC) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id 103B5C223C7 for ; Thu, 25 Jan 2018 11:05:58 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id A5791ADFB; Thu, 25 Jan 2018 11:05:57 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Thu, 25 Jan 2018 12:05:52 +0100 Message-Id: <20180125110556.76352-12-agraf@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20180125110556.76352-1-agraf@suse.de> References: <20180125110556.76352-1-agraf@suse.de> Cc: Tom Rini Subject: [U-Boot] [PATCH v3 11/15] pl01x: Convert CONFIG_PL01X_SERIAL to Kconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We want to use Kconfig logic to depend on whether pl01x devices are built in, so let's convert their inclusion selection to Kconfig. This round goes to pl01x. Signed-off-by: Alexander Graf --- arch/arm/Kconfig | 11 +++++++++++ drivers/serial/Kconfig | 6 ++++++ include/configs/hikey.h | 3 --- include/configs/integrator-common.h | 2 -- include/configs/poplar.h | 3 --- include/configs/qemu-arm.h | 3 --- include/configs/rpi.h | 1 - include/configs/stv0991.h | 3 --- include/configs/thunderx_88xx.h | 1 - include/configs/vexpress_aemv8a.h | 1 - scripts/config_whitelist.txt | 1 - 11 files changed, 17 insertions(+), 18 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1557e7cfdf..b2345eaa26 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -493,6 +493,7 @@ config TARGET_STV0991 select DM_SPI select DM_SPI_FLASH select SPI_FLASH + select PL01X_SERIAL config TARGET_X600 bool "Support x600" @@ -548,6 +549,7 @@ config ARCH_BCM283X select DM_SERIAL select DM_GPIO select OF_CONTROL + select PL01X_SERIAL imply FAT_WRITE config TARGET_VEXPRESS_CA15_TC2 @@ -630,6 +632,7 @@ config ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" select DM select DM_SERIAL + select PL01X_SERIAL config ARCH_KEYSTONE bool "TI Keystone" @@ -697,6 +700,7 @@ config ARCH_QEMU select DM select DM_SERIAL select OF_CONTROL + select PL01X_SERIAL config ARCH_RMOBILE bool "Renesas ARM SoCs" @@ -835,15 +839,18 @@ config TEGRA config TARGET_VEXPRESS64_AEMV8A bool "Support vexpress_aemv8a" select ARM64 + select PL01X_SERIAL config TARGET_VEXPRESS64_BASE_FVP bool "Support Versatile Express ARMv8a FVP BASE model" select ARM64 select SEMIHOSTING + select PL01X_SERIAL config TARGET_VEXPRESS64_BASE_FVP_DRAM bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM" select ARM64 + select PL01X_SERIAL help This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides the default config to allow the user to load the images directly into @@ -853,6 +860,7 @@ config TARGET_VEXPRESS64_BASE_FVP_DRAM config TARGET_VEXPRESS64_JUNO bool "Support Versatile Express Juno Development Platform" select ARM64 + select PL01X_SERIAL config TARGET_LS2080A_EMU bool "Support ls2080a_emu" @@ -945,6 +953,7 @@ config TARGET_HIKEY select DM_GPIO select DM_SERIAL select OF_CONTROL + select PL01X_SERIAL help Support for HiKey 96boards platform. It features a HI6220 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. @@ -956,6 +965,7 @@ config TARGET_POPLAR select OF_CONTROL select DM_SERIAL select DM_USB + select PL01X_SERIAL help Support for Poplar 96boards EE platform. It features a HI3798cv200 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU @@ -1211,6 +1221,7 @@ config TARGET_THUNDERX_88XX select ARM64 select OF_CONTROL select SYS_CACHE_SHIFT_7 + select PL01X_SERIAL config ARCH_ASPEED bool "Support Aspeed SoCs" diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 99aa817e63..4167683885 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -459,6 +459,12 @@ config PL011_SERIAL help Select this to enable a UART for platforms using PL011. +config PL01X_SERIAL + bool "ARM PL010 and PL011 driver" + depends on DM_SERIAL + help + Select this to enable a UART for platforms using PL010 or PL011. + config ROCKCHIP_SERIAL bool "Rockchip on-chip UART support" depends on DM_SERIAL && SPL_OF_PLATDATA diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 7eaa6e4667..aaddf4c1f1 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -50,9 +50,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M) -/* Serial port PL010/PL011 through the device model */ -#define CONFIG_PL01X_SERIAL - #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000 /*#define CONFIG_DWC2_DFLT_SPEED_FULL*/ diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index edc798b117..f66d954748 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */ -/* Serial port PL010/PL011 through the device model */ -#define CONFIG_PL01X_SERIAL #define CONFIG_CONS_INDEX 0 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 8a12b526a8..9641b27b1b 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -26,9 +26,6 @@ /* ATF bl33.bin load address (must match) */ #define CONFIG_SYS_TEXT_BASE 0x37000000 -/* PL010/PL011 */ -#define CONFIG_PL01X_SERIAL - /* USB configuration */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index c8852cef34..c8ba78d8aa 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -20,9 +20,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) #define CONFIG_SYS_MALLOC_LEN SZ_16M -/* QEMU's PL011 serial port is detected via FDT using the device model */ -#define CONFIG_PL01X_SERIAL - /* QEMU implements a 62.5MHz architected timer */ /* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */ #define CONFIG_SYS_ARCH_TIMER diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 2c84cf9a49..5ffe98015f 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -77,7 +77,6 @@ /* Console UART, can be configured dynamically in config.txt */ #define CONFIG_BCM283X_MU_SERIAL -#define CONFIG_PL01X_SERIAL /* Console configuration */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index c99fb676cb..3e0b8a157f 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -25,9 +25,6 @@ (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) -/* serial port (PL011) configuration */ -#define CONFIG_PL01X_SERIAL - /* user interface */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 209a7c3417..34940efb41 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -35,7 +35,6 @@ /* PL011 Serial Configuration */ -#define CONFIG_PL01X_SERIAL #define CONFIG_PL011_CLOCK 24000000 #define CONFIG_CONS_INDEX 1 diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index f18e2ee068..07cc92ce17 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -110,7 +110,6 @@ /* PL011 Serial Configuration */ #define CONFIG_CONS_INDEX 0 -#define CONFIG_PL01X_SERIAL #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_PL011_CLOCK 7273800 #else diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index a4159ebb36..6e4e322986 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1628,7 +1628,6 @@ CONFIG_PIXIS_BRDCFG1_TDM CONFIG_PIXIS_SGMII_CMD CONFIG_PL011_CLOCK CONFIG_PL011_SERIAL_RLCR -CONFIG_PL01X_SERIAL CONFIG_PL01x_PORTS CONFIG_PLATFORM_ENV_SETTINGS CONFIG_PLATINUM_BOARD