From patchwork Wed Jan 17 08:54:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 124791 Delivered-To: patch@linaro.org Received: by 10.46.64.148 with SMTP id r20csp1309197lje; Wed, 17 Jan 2018 00:58:06 -0800 (PST) X-Google-Smtp-Source: ACJfBovDlfaJCaHvXNQQvGMADcGVFRzm9Ad3yrOI49QBL21RashaJniTDMGepqW6cGFTHQGTLAB5 X-Received: by 10.80.230.142 with SMTP id z14mr1911503edm.174.1516179486853; Wed, 17 Jan 2018 00:58:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516179486; cv=none; d=google.com; s=arc-20160816; b=Hx1ruHEFczRggOFLI3erXuZWU8BLGcN2hs7XBaQsILXQXxdtHs6vRII5mZz8d9KPBa PhHoSUjEr5MrOZ7JoaZyzztVrpVDxIplGXPESAV6tgrnXFFV5BibyTsflDYGYKttyN7Q D3n2puTN3P5QwXI9d8jtTGBgStrdWTYz+7KES7lU7nH3YSN7zM7PiHt/MtKX7l80OKSJ HbHWNQvorpN8DVBZZUme3NVl7fO0aeI0FY7KQIFbnTGQ+WSFf64SC0WJn0hd1qNTcjiA uYaB7lWFxlKEH/Ne6rTseL/5Yvjg8XbppXHTDIBWoq1TkVkQZ+K8Zuygws/xbUOYmg6l PNkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:arc-authentication-results; bh=lgTVubtFZyct4UncXXkgNczrVP2SVw6RC3sxouxiV5U=; b=Wi0+xNrUIiYX3t9Savst6gwGwEC3kBTZz9tOZdgEDdDnEXTHxCju14EXWDtTAqoRG0 Zf3XR5ln5Ers0G5JSWTYRi0g6Vp80Ve7KnTGNlwcHWgM9LK0/cSuYCp9DmY6Ji+nWfK3 MV2+9YpeqAUhrfCvZBR1rtaAXY4EYZLGRUJXsGxOJAVSXkIbgninKHqra452NRbj5S3z x9QfOfCFt2KVuGDx7VUFlyyNVpvhz64JM8xinImOkCVZNltRP/YxEoozgsS8jkRk1oD5 ecVQDHvVbRH6/eckOXBT0FkPE9cVbYexrP+/z+u9vxkWzAwN6Br9bDiLuXA58YxQE8G8 NLCg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id o26si994600edf.195.2018.01.17.00.58.06; Wed, 17 Jan 2018 00:58:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 66035C21E70; Wed, 17 Jan 2018 08:56:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 01F10C21E3E; Wed, 17 Jan 2018 08:55:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2E5A6C21C50; Wed, 17 Jan 2018 08:55:00 +0000 (UTC) Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id BD1C6C21DE8 for ; Wed, 17 Jan 2018 08:54:59 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 1950FAEEF; Wed, 17 Jan 2018 08:54:59 +0000 (UTC) From: Alexander Graf To: u-boot@lists.denx.de Date: Wed, 17 Jan 2018 09:54:56 +0100 Message-Id: <20180117085458.27293-6-agraf@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20180117085458.27293-1-agraf@suse.de> References: <20180117085458.27293-1-agraf@suse.de> Cc: Heinrich Schuchardt Subject: [U-Boot] [PATCH v2 5/7] rpi: Properly detect which serial device is active X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that we have all infrastructure in place to dynamically determine whether a serial device is actually usable (read: routed to user accessible pins), we can wire it up to the board. This patch adds support to determine whether the pl011 or mini-uart or no serial is routed to the UART RX/TX pins on the Raspberry Pi family of boards. Signed-off-by: Alexander Graf --- board/raspberrypi/rpi/rpi.c | 69 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index a96d5d8952..b0cdad70f7 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -24,9 +24,16 @@ #include #endif #include +#include DECLARE_GLOBAL_DATA_PTR; +/* + * This is the GPIO pin that the user facing UART RX line is attached to. + * We use this pin to determine which serial device is available. + */ +#define BCM2835_GPIO_RX 15 + /* From lowlevel_init.S */ extern unsigned long fw_dtb_pointer; @@ -419,6 +426,68 @@ static void get_board_rev(void) printf("RPI %s (0x%x)\n", model->name, revision); } +/* + * We may get called before the device model is initialized, so we can not + * rely on the GPIO driver. + */ +int get_func_id(unsigned gpio) +{ + u32 val; + u32 node; + u32 *gpfsel; + fdt_addr_t addr; + fdt_size_t size; + + node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "brcm,bcm2835-gpio"); + if (node < 0) + return -EINVAL; + + addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, node, "reg", + 0, &size, true); + gpfsel = (void*)addr; + + val = readl(&gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); + + return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK); +} + + +/* + * The RPi has 2 serial ports: A PL011 based one and the mini-uart. + * Depending on firmware configuration, either can be configured to either + * nothing, the wifi adapter or serial output. + * + * We only want to use the serial port that is user facing to not + * end up with a potentially unresponsive serial port. Due to this + * we need to check whether the serial device is actually connected + * to the UART RX/TX pins on the RPi GPIO pin bar. + * + * We only allow U-Boot to instantiate the serial driver for the serial + * device that is muxed correctly. + */ +int board_check_serial(struct udevice *dev) +{ + int func; + + printf("Checking serial %s\n", dev->name); + + if (device_is_compatible(dev, "arm,pl011")) { + func = BCM2835_GPIO_ALT0; + } else if (device_is_compatible(dev, "brcm,bcm2835-aux-uart")) { + func = BCM2835_GPIO_ALT5; + } else { + return 0; + } + + if (get_func_id(BCM2835_GPIO_RX) != func) { + printf("Disabling serial %s\n", dev->name); + return -ENODEV; + } + + printf("Enabling serial %s\n", dev->name); + return 0; +} + int board_init(void) { #ifdef CONFIG_HW_WATCHDOG