From patchwork Mon Dec 18 09:40:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 122195 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2612007qgn; Mon, 18 Dec 2017 01:45:41 -0800 (PST) X-Google-Smtp-Source: ACJfBos87RYUIea+tvyTOyghEm3A7aX/4YTR3TOQaKdnLhZmQeNVDHbIudzJsQ5jMGwtfw62y40G X-Received: by 10.80.151.125 with SMTP id d58mr27913227edb.236.1513590341689; Mon, 18 Dec 2017 01:45:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513590341; cv=none; d=google.com; s=arc-20160816; b=OE+yJ2v3Jl4PqRKrAFMaJ9tJ4kT89Z3Kt6eqf+s50CInJl/s86skIUMlBHa2BuaVXc x0u18ngpX1Va8gv6729GSnHDSSfdNf7kYepkKLSD7Ezcju3n6P8YrcUVWyHGwh11nPNt 8qGcG7YZXiydw4cwznu8HDwy4j7h7IoE3gb/zpp0VVOlU6vWmlhQyrqt88Fmd+gS3Kt8 fOAqR59fR/q9N3ZYHElUys9ulVRx9/oAcpzh3RXkaX1zM9Ch4dEtYXdekJHupZqjJjIk TaahtNnrjzsC2Y1FtSxw+4D77ei+uNP8iOUqT3edGisXy6hDjTCIUBkQvBoMn6bO7312 Mdhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=L4W7b301fk6kxGvYmUr0d5eg7pthZpShBTA8/RzchBg=; b=MUpG/eyICYVCR4hFXiBZQXAXK8nr/CZpo04Rh0nDLjqNDhJXfyc3VYzR/4iob88vMI VXsa/mQEfdZf//l5CML2pi7pRrpuqZf6pI/sk5mFRVBkSDUcpuZjgjz/zzJ9eEBeSFhq 3KploOFJFeM/7L26JCXUwI4hlR2MBgC3e8LgzhHXPw/YFpJSc8sGR4so084mH981U+2U Bd9OQ9rHOn5df2H1qdpE6QvzPmjBjrdbP8a+WrhrJjwO7bB0bea/Okd0YtA/ajSnGps+ TUCgKvQfCdBaieoC2Iby1MnnABB9RzApYaNBssDwrVb91JMv/H5TkLl7uFlb/GkfJ0+y 86zw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=alUY5Bvt; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id x22si1148515edm.58.2017.12.18.01.45.41; Mon, 18 Dec 2017 01:45:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=alUY5Bvt; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: by lists.denx.de (Postfix, from userid 105) id 4778EC21F33; Mon, 18 Dec 2017 09:43:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 69E14C21F41; Mon, 18 Dec 2017 09:43:56 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 75934C21E52; Mon, 18 Dec 2017 09:40:55 +0000 (UTC) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by lists.denx.de (Postfix) with ESMTPS id CE5E9C21F01 for ; Mon, 18 Dec 2017 09:40:54 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBI9erQW021706; Mon, 18 Dec 2017 03:40:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513590053; bh=AcAFRplinuCCSq8UHw+6jrjXfApu6TYc71CA4+2TKS4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=alUY5Bvtl4ZPvPPkXR41h4st0N9IWzEDhX1h5RiMclnY/96ZDtTjvGh53KPsNqZAq pxL0pQ5BObpEQOJtUXJ2ctoHVTHrgGBtZvBXfBbdqhYrXP6VVVCSgFwUZ8FxoGTWmL V2zgnb5lQobBDf1xU2OPtgWXE6Q4KvQIvJYOevCs= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBI9erJn008503; Mon, 18 Dec 2017 03:40:53 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 18 Dec 2017 03:40:53 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 18 Dec 2017 03:40:53 -0600 Received: from uda0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBI9efg9005531; Mon, 18 Dec 2017 03:40:51 -0600 From: Lokesh Vutla To: Tom Rini , Date: Mon, 18 Dec 2017 15:10:07 +0530 Message-ID: <20171218094007.12882-6-lokeshvutla@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171218094007.12882-1-lokeshvutla@ti.com> References: <20171218094007.12882-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Tero Kristo Subject: [U-Boot] [PATCH 5/5] board: ti: dra76: mux wakeup2 as gpio1_2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tomi Valkeinen gpio1_2 is used for HPD interrupt with DRA76's DVI add-on board, so mux the pin as gpio and PIN_INPUT. Signed-off-by: Tomi Valkeinen --- board/ti/dra7xx/mux_data.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 3c3a19a0e1..b5dcaa584a 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -882,7 +882,7 @@ const struct pad_conf_entry dra76x_core_padconf_array[] = { {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ {WAKEUP0, (M14 | PIN_OUTPUT)}, /* N/A.gpio1_0 */ {WAKEUP1, (M14 | PIN_OUTPUT)}, /* N/A.gpio1_1 */ - {WAKEUP2, (M1 | PIN_OUTPUT)}, /* N/A.sys_nirq2 */ + {WAKEUP2, (M14 | PIN_INPUT)}, /* N/A.gpio1_2 */ {WAKEUP3, (M1 | PIN_OUTPUT)}, /* N/A.sys_nirq1 */ };