From patchwork Fri Jun 5 08:23:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2h1bmZlbmcgWXVuICjkupHmmKXls7Ap?= X-Patchwork-Id: 241772 List-Id: U-Boot discussion From: chunfeng.yun at mediatek.com (Chunfeng Yun) Date: Fri, 5 Jun 2020 16:23:00 +0800 Subject: [PATCH 5/6] arm: dts: mt8512: add usb related nodes In-Reply-To: <1591345381-2780-1-git-send-email-chunfeng.yun@mediatek.com> References: <1591345381-2780-1-git-send-email-chunfeng.yun@mediatek.com> Message-ID: <1591345381-2780-6-git-send-email-chunfeng.yun@mediatek.com> Add usb, usb phy nodes Signed-off-by: Chunfeng Yun --- arch/arm/dts/mt8512-bm1-emmc.dts | 10 ++++++++++ arch/arm/dts/mt8512.dtsi | 41 +++++++++++++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/mt8512-bm1-emmc.dts b/arch/arm/dts/mt8512-bm1-emmc.dts index 296ed93..0788e05 100644 --- a/arch/arm/dts/mt8512-bm1-emmc.dts +++ b/arch/arm/dts/mt8512-bm1-emmc.dts @@ -95,6 +95,16 @@ }; }; +&ssusb { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + status = "okay"; +}; + +&u3phy { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; diff --git a/arch/arm/dts/mt8512.dtsi b/arch/arm/dts/mt8512.dtsi index 01a02a7..b5d833c 100644 --- a/arch/arm/dts/mt8512.dtsi +++ b/arch/arm/dts/mt8512.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8512"; @@ -100,6 +101,44 @@ status = "disabled"; }; + ssusb: usb at 11211000 { + compatible = "mediatek,mt8512-mtu3", "mediatek,mtu3"; + reg = <0x11211000 0x2dff>, + <0x11213e00 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + phys = <&u2port0 PHY_TYPE_USB2>; + clocks = <&infracfg CLK_INFRA_USB_SYS>, + <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>, + <&infracfg CLK_INFRA_ICUSB>; + clock-names = "sys_ck", "ref_ck", "mcu_ck"; + status = "disabled"; + }; + + u3phy: usb-phy at 11cc0000 { + compatible = "mediatek,mt8512-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + u2port0: usb-phy at 11cc0000 { + reg = <0x11cc0000 0x400>; + clocks = <&topckgen CLK_TOP_USB20_48M_EN>; + clock-names = "ref"; + #phy-cells = <1>; + mediatek,discth = <15>; + status = "okay"; + }; + + u2port1: usb-phy at 11c40000 { + reg = <0x11c40000 0x400>; + #phy-cells = <1>; + status = "okay"; + }; + }; + mmc0: mmc at 11230000 { compatible = "mediatek,mt8512-mmc"; reg = <0x11230000 0x1000>, @@ -112,4 +151,4 @@ status = "disabled"; }; -}; \ No newline at end of file +};