From patchwork Thu Apr 23 13:25:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur \(OSS\)" X-Patchwork-Id: 238392 List-Id: U-Boot discussion From: madalin.bucur at oss.nxp.com (Madalin Bucur) Date: Thu, 23 Apr 2020 16:25:15 +0300 Subject: [PATCH 05/12] ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB In-Reply-To: <1587648322-24795-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1587648322-24795-1-git-send-email-madalin.bucur@oss.nxp.com> Message-ID: <1587648322-24795-6-git-send-email-madalin.bucur@oss.nxp.com> Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB device tree. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur --- arch/arm/dts/fsl-ls1046a-rdb.dts | 67 ++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/fsl-ls1046a.dtsi | 2 +- 2 files changed, 68 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-rdb.dts index 83e34ab..cac65a7 100644 --- a/arch/arm/dts/fsl-ls1046a-rdb.dts +++ b/arch/arm/dts/fsl-ls1046a-rdb.dts @@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016, Freescale Semiconductor + * Copyright 2020 NXP * * Mingkai Hu */ @@ -51,3 +52,69 @@ &i2c3 { status = "okay"; }; + +#include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet at e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-id"; + status = "okay"; + }; + + ethernet at e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-id"; + status = "okay"; + }; + + ethernet at e8000 { + phy-handle = <&sgmii_phy1>; + phy-connection-type = "sgmii"; + status = "okay"; + }; + + ethernet at ea000 { + phy-handle = <&sgmii_phy2>; + phy-connection-type = "sgmii"; + status = "okay"; + }; + + ethernet at f0000 { /* 10GEC1 */ + phy-handle = <&aqr106_phy>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + ethernet at f2000 { /* 10GEC2 */ + fixed-link = <0 1 1000 0 0>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + mdio at fc000 { + rgmii_phy1: ethernet-phy at 1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy at 2 { + reg = <0x2>; + }; + + sgmii_phy1: ethernet-phy at 3 { + reg = <0x3>; + }; + + sgmii_phy2: ethernet-phy at 4 { + reg = <0x4>; + }; + }; + + mdio at fd000 { + aqr106_phy: ethernet-phy at 0 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 131 4>; + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi index fdf93fd..4e91d5c 100644 --- a/arch/arm/dts/fsl-ls1046a.dtsi +++ b/arch/arm/dts/fsl-ls1046a.dtsi @@ -31,7 +31,7 @@ interrupts = <1 9 0xf08>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>;