diff mbox series

[v5,14/17] arm: socfpga: Add ATF support to query FPGA configuration status

Message ID 1584019434-45856-15-git-send-email-chee.hong.ang@intel.com
State New
Headers show
Series Enable ARM Trusted Firmware for U-Boot | expand

Commit Message

Ang, Chee Hong March 12, 2020, 1:23 p.m. UTC
From: Chee Hong Ang <chee.hong.ang at intel.com>

In EL3, do_bridge_reset() directly send mailbox commands to SDM to
query the FPGA configuration status. If running in non-secure
mode (EL2), it invokes SMC service calls to ATF (EL3) to perform the
query.

Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
---
 arch/arm/mach-socfpga/misc_s10.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index ba11bfa..6b5dd03 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -12,6 +12,7 @@ 
 #include <asm/arch/misc.h>
 #include <asm/arch/mailbox_s10.h>
 #include <asm/arch/reset_manager.h>
+#include <linux/intel-smc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -70,11 +71,24 @@  void do_bridge_reset(int enable, unsigned int mask)
 {
 	/* Check FPGA status before bridge enable */
 	if (enable) {
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
+		u64 config_status = 1;
+
+		/* Send MBOX_RECONFIG_STATUS to SDM */
+		int ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, NULL, 0,
+				 NULL, 0);
+
+		if (ret && ret != INTEL_SIP_SMC_STATUS_BUSY) {
+			/* Send MBOX_CONFIG_STATUS to SDM */
+			ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE,
+					 &config_status, 1, NULL, 0);
+		}
+#else
 		int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
 
 		if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
 			ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
-
+#endif
 		if (ret)
 			return;
 	}