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[2/3] armv8/ls1043ardb: RGMII ports require internal delay

Message ID 1584017626-8547-3-git-send-email-madalin.bucur@oss.nxp.com
State Superseded
Headers show
Series armv8/ls104xardb: RGMII ports require internal delay | expand

Commit Message

Madalin Bucur (OSS) March 12, 2020, 12:53 p.m. UTC
The correct setting for the RGMII ports on LS1043ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns
on Rx internal delay by default and the u-boot does not
override that (yet) so in u-boot the interface is functional.
In Linux the PHY driver is clearing the Rx delay for the
"rgmii-txid" mode and the reception does not work.
Changing the RGMII mode to internal delay here ensures that
device tree fix-ups for the PHY connection type turn on both
Tx and Rx internal delay in Linux.

Fixes: 5a78a472f666 ("armv8/ls1043a: RGMII PHY requires internal
	delay on Tx")
Signed-off-by: Madalin Bucur <madalin.bucur at oss.nxp.com>
---
 drivers/net/fm/ls1043.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Priyanka Jain (OSS) March 23, 2020, 10:30 a.m. UTC | #1
>-----Original Message-----
>From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Madalin Bucur
>Sent: Thursday, March 12, 2020 6:24 PM
>To: joe.hershberger at ni.com; u-boot at lists.denx.de
>Cc: Madalin Bucur (OSS) <madalin.bucur at oss.nxp.com>
>Subject: [PATCH 2/3] armv8/ls1043ardb: RGMII ports require internal delay
The changes are in net driver. Please use net in prefix?.
Are the changes board specific? Or soc specific?
>
>The correct setting for the RGMII ports on LS1043ARDB is to enable delay on
>both Rx and Tx so the interface mode used must be
>PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns on Rx internal
>delay by default and the u-boot does not override that (yet) so in u-boot the
>interface is functional.
>In Linux the PHY driver is clearing the Rx delay for the "rgmii-txid" mode and
>the reception does not work.
>Changing the RGMII mode to internal delay here ensures that device tree fix-
>ups for the PHY connection type turn on both Tx and Rx internal delay in
>Linux.
>
>Fixes: 5a78a472f666 ("armv8/ls1043a: RGMII PHY requires internal
>	delay on Tx")
>Signed-off-by: Madalin Bucur <madalin.bucur at oss.nxp.com>
>---
> drivers/net/fm/ls1043.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c index
>cd510f2..ba4da69 100644
>--- a/drivers/net/fm/ls1043.c
>+++ b/drivers/net/fm/ls1043.c
>@@ -65,12 +65,12 @@ phy_interface_t fman_port_enet_if(enum fm_port
>port)
> 	if (port == FM1_DTSEC3)
> 		if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
> 				FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII)
>{
>-			return PHY_INTERFACE_MODE_RGMII_TXID;
>+			return PHY_INTERFACE_MODE_RGMII_ID;
> 		}
> 	if (port == FM1_DTSEC4)
> 		if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
> 				FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII)
>{
>-			return PHY_INTERFACE_MODE_RGMII_TXID;
>+			return PHY_INTERFACE_MODE_RGMII_ID;
> 		}
>
> 	/* handle SGMII */
>--
>2.1.0
Priyanka
Madalin Bucur (OSS) March 23, 2020, 10:38 a.m. UTC | #2
> -----Original Message-----
> From: Priyanka Jain (OSS) <priyanka.jain at oss.nxp.com>
> Sent: Monday, March 23, 2020 12:30 PM
> To: Madalin Bucur (OSS) <madalin.bucur at oss.nxp.com>;
> joe.hershberger at ni.com; u-boot at lists.denx.de
> Subject: RE: [PATCH 2/3] armv8/ls1043ardb: RGMII ports require internal
> delay
> 
> >-----Original Message-----
> >From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Madalin Bucur
> >Sent: Thursday, March 12, 2020 6:24 PM
> >To: joe.hershberger at ni.com; u-boot at lists.denx.de
> >Cc: Madalin Bucur (OSS) <madalin.bucur at oss.nxp.com>
> >Subject: [PATCH 2/3] armv8/ls1043ardb: RGMII ports require internal delay
> The changes are in net driver. Please use net in prefix?.
> Are the changes board specific? Or soc specific?

The net: prefix could have been added but the RGMII in the subject is a
sufficient hint, no need to bloat the subject line further. This change
in particular is board specific, so the subject is correct in that respect.

Please use empty lines around your replies, they are unreadable like that.

> >The correct setting for the RGMII ports on LS1043ARDB is to enable delay
> on
> >both Rx and Tx so the interface mode used must be
> >PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns on Rx internal
> >delay by default and the u-boot does not override that (yet) so in u-boot
> the
> >interface is functional.
> >In Linux the PHY driver is clearing the Rx delay for the "rgmii-txid"
> mode and
> >the reception does not work.
> >Changing the RGMII mode to internal delay here ensures that device tree
> fix-
> >ups for the PHY connection type turn on both Tx and Rx internal delay in
> >Linux.
> >
> >Fixes: 5a78a472f666 ("armv8/ls1043a: RGMII PHY requires internal
> >	delay on Tx")
> >Signed-off-by: Madalin Bucur <madalin.bucur at oss.nxp.com>
> >---
> > drivers/net/fm/ls1043.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> >diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c index
> >cd510f2..ba4da69 100644
> >--- a/drivers/net/fm/ls1043.c
> >+++ b/drivers/net/fm/ls1043.c
> >@@ -65,12 +65,12 @@ phy_interface_t fman_port_enet_if(enum fm_port
> >port)
> > 	if (port == FM1_DTSEC3)
> > 		if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
> > 				FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII)
> >{
> >-			return PHY_INTERFACE_MODE_RGMII_TXID;
> >+			return PHY_INTERFACE_MODE_RGMII_ID;
> > 		}
> > 	if (port == FM1_DTSEC4)
> > 		if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
> > 				FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII)
> >{
> >-			return PHY_INTERFACE_MODE_RGMII_TXID;
> >+			return PHY_INTERFACE_MODE_RGMII_ID;
> > 		}
> >
> > 	/* handle SGMII */
> >--
> >2.1.0
> Priyanka
diff mbox series

Patch

diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c
index cd510f2..ba4da69 100644
--- a/drivers/net/fm/ls1043.c
+++ b/drivers/net/fm/ls1043.c
@@ -65,12 +65,12 @@  phy_interface_t fman_port_enet_if(enum fm_port port)
 	if (port == FM1_DTSEC3)
 		if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
 				FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII) {
-			return PHY_INTERFACE_MODE_RGMII_TXID;
+			return PHY_INTERFACE_MODE_RGMII_ID;
 		}
 	if (port == FM1_DTSEC4)
 		if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
 				FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII) {
-			return PHY_INTERFACE_MODE_RGMII_TXID;
+			return PHY_INTERFACE_MODE_RGMII_ID;
 		}
 
 	/* handle SGMII */