From patchwork Mon Mar 9 09:07:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ang, Chee Hong" X-Patchwork-Id: 243437 List-Id: U-Boot discussion From: chee.hong.ang at intel.com (chee.hong.ang at intel.com) Date: Mon, 9 Mar 2020 02:07:19 -0700 Subject: [PATCH v4 18/21] arm: socfpga: Add ATF support to query FPGA configuration status In-Reply-To: <1583744842-24632-1-git-send-email-chee.hong.ang@intel.com> References: <1583744842-24632-1-git-send-email-chee.hong.ang@intel.com> Message-ID: <1583744842-24632-19-git-send-email-chee.hong.ang@intel.com> From: Chee Hong Ang In EL3, do_bridge_reset() directly send mailbox commands to SDM to query the FPGA configuration status. If running in non-secure mode (EL2), it invokes SMC service calls to ATF (EL3) to perform the query. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/misc_s10.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c index ba11bfa..6b5dd03 100644 --- a/arch/arm/mach-socfpga/misc_s10.c +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -12,6 +12,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -70,11 +71,24 @@ void do_bridge_reset(int enable, unsigned int mask) { /* Check FPGA status before bridge enable */ if (enable) { +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) + u64 config_status = 1; + + /* Send MBOX_RECONFIG_STATUS to SDM */ + int ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, NULL, 0, + NULL, 0); + + if (ret && ret != INTEL_SIP_SMC_STATUS_BUSY) { + /* Send MBOX_CONFIG_STATUS to SDM */ + ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, + &config_status, 1, NULL, 0); + } +#else int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS); if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG) ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS); - +#endif if (ret) return; }