From patchwork Fri Feb 21 05:47:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ang, Chee Hong" X-Patchwork-Id: 236688 List-Id: U-Boot discussion From: chee.hong.ang at intel.com (chee.hong.ang at intel.com) Date: Thu, 20 Feb 2020 21:47:33 -0800 Subject: [PATCH v3 15/21] net: designware: socfpga: Secure register access in MAC driver In-Reply-To: <1582264059-37988-1-git-send-email-chee.hong.ang@intel.com> References: <1582264059-37988-1-git-send-email-chee.hong.ang@intel.com> Message-ID: <1582264059-37988-16-git-send-email-chee.hong.ang@intel.com> From: Chee Hong Ang Allow MAC driver to access System Manager's EMAC control registers in non-secure mode. Signed-off-by: Chee Hong Ang --- drivers/net/dwmac_socfpga.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/dwmac_socfpga.c b/drivers/net/dwmac_socfpga.c index e93561d..293c660 100644 --- a/drivers/net/dwmac_socfpga.c +++ b/drivers/net/dwmac_socfpga.c @@ -17,6 +17,7 @@ #include #include +#include #include struct dwmac_socfpga_platdata { @@ -98,8 +99,8 @@ static int dwmac_socfpga_probe(struct udevice *dev) reset_assert_bulk(&reset_bulk); modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift; - clrsetbits_le32(pdata->phy_intf, modemask, - modereg << pdata->reg_shift); + socfpga_secure_reg_update32((phys_addr_t)pdata->phy_intf, modemask, + modereg << pdata->reg_shift); reset_release_bulk(&reset_bulk);