From patchwork Fri Feb 14 05:34:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Khan X-Patchwork-Id: 236322 List-Id: U-Boot discussion From: wasim.khan at nxp.com (Wasim Khan) Date: Fri, 14 Feb 2020 11:04:36 +0530 Subject: [PATCH 3/3] board: fsl: lx2160a: Add GIC LPI memory reserve fixup In-Reply-To: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> References: <1581658476-12611-1-git-send-email-wasim.khan@nxp.com> Message-ID: <1581658476-12611-4-git-send-email-wasim.khan@nxp.com> Reserve DDR memory region used for GIC LPI configuration table. Signed-off-by: Wasim Khan --- board/freescale/lx2160a/lx2160a.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index d8753b1..34f866b 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -630,6 +630,21 @@ void board_quiesce_devices(void) } #endif +#ifdef CONFIG_GIC_V3_ITS +void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) +{ + u32 phandle; + int err; + struct fdt_memory gic_lpi; + + gic_lpi.start = gic_lpi_base; + gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1; + err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle); + if (err < 0) + debug("failed to add reserved memory: %d\n", err); +} +#endif + #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { @@ -664,6 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_GIC_V3_ITS gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE; gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); + fdt_fixup_gic_lpi_memory(blob, gic_lpi_base); #endif #ifdef CONFIG_RESV_RAM