@@ -304,7 +304,6 @@
#define CONFIG_SYS_FSL_ESDHC_BE
#define CONFIG_SYS_FSL_WDOG_BE
#define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_QSPI_BE
#define CONFIG_SYS_FSL_CCSR_GUR_BE
#define CONFIG_SYS_FSL_PEX_LUT_BE
@@ -94,7 +94,6 @@
#define CONFIG_SYS_FSL_ESDHC_BE
#define CONFIG_SYS_FSL_WDOG_BE
#define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_QSPI_BE
#define CONFIG_SYS_FSL_DCU_BE
#define CONFIG_SYS_FSL_SEC_MON_LE
#define CONFIG_SYS_FSL_SFP_VER_3_2
@@ -37,23 +37,9 @@
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
/*SPI device */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT)
#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
+#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
#define CONFIG_SPI_FLASH_SPANSION
-#define CONFIG_FSL_SPI_INTERFACE
-#define CONFIG_SF_DATAFLASH
-
-#define QSPI0_AMBA_BASE 0x40000000
-#define CONFIG_SPI_FLASH_SPANSION
-
-#define FSL_QSPI_FLASH_SIZE SZ_64M
-#define FSL_QSPI_FLASH_NUM 2
-
-/*
- * Environment
- */
-#define CONFIG_ENV_OVERWRITE
-#endif
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
@@ -33,9 +33,6 @@
func(USB, usb, 0)
#endif
-#undef FSL_QSPI_FLASH_SIZE
-#define FSL_QSPI_FLASH_SIZE SZ_16M
-
/* MMC */
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
@@ -16,9 +16,6 @@
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
-
-/* ENV */
-#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
/*
* I2C IO expander
*/
@@ -131,12 +131,6 @@
/* SPI */
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SPI_FLASH_SPANSION
-
-/* QSPI */
-#define QSPI0_AMBA_BASE 0x40000000
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
-#define CONFIG_SPI_FLASH_SPANSION
#endif
/* DM SPI */
@@ -357,20 +357,9 @@ unsigned long get_board_ddr_clk(void);
* MMC
*/
-/* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-/* QSPI */
-#define QSPI0_AMBA_BASE 0x40000000
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
-
-/* DSPI */
-
/* DM SPI */
#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI)
#define CONFIG_DM_SPI_FLASH
-#define CONFIG_SPI_FLASH_DATAFLASH
-#endif
#endif
/*
@@ -228,16 +228,6 @@
* MMC
*/
-/* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-/* QSPI */
-#define QSPI0_AMBA_BASE 0x40000000
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
-
-/* DSPI */
-#endif
-
/* DM SPI */
#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI)
#define CONFIG_DM_SPI_FLASH
@@ -384,8 +384,6 @@ unsigned long get_board_ddr_clk(void);
(defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI))
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
#endif
#endif
@@ -96,10 +96,7 @@
/*
* Environment
*/
-#define CONFIG_ENV_OVERWRITE
-
#define CONFIG_SYS_MMC_ENV_DEV 0
-
#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
/* FMan */
@@ -117,12 +114,6 @@
#endif
-/* QSPI device */
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE SZ_64M
-#define FSL_QSPI_FLASH_NUM 1
-#endif
-
#undef CONFIG_BOOTCOMMAND
#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;;"
@@ -46,8 +46,6 @@ unsigned long get_board_ddr_clk(void);
defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
#endif
#endif
@@ -425,16 +423,7 @@ unsigned long get_board_ddr_clk(void);
/*
* Environment
*/
-#define CONFIG_ENV_OVERWRITE
-
-#ifdef CONFIG_TFABOOT
#define CONFIG_SYS_MMC_ENV_DEV 0
-#else
-#ifdef CONFIG_NAND_BOOT
-#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-#endif
#define CONFIG_CMDLINE_TAG
@@ -153,19 +153,8 @@
/*
* Environment
*/
-#ifndef SPL_NO_ENV
-#define CONFIG_ENV_OVERWRITE
-#endif
-
-#ifdef CONFIG_TFABOOT
#define CONFIG_SYS_MMC_ENV_DEV 0
-
#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
-#else
-#if defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-#endif
#define AQR105_IRQ_MASK 0x80000000
/* FMan */
@@ -195,8 +184,6 @@
#ifndef SPL_NO_QSPI
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 26)
-#define FSL_QSPI_FLASH_NUM 2
#endif
#endif
@@ -35,13 +35,7 @@
#endif
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
-#else
-#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
-#endif
-#endif
#define CONFIG_SKIP_LOWLEVEL_INIT
@@ -358,14 +358,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-/* QSPI device */
-#if defined(CONFIG_TFABOOT) || \
- defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define FSL_QSPI_FLASH_SIZE (1 << 26)
-#define FSL_QSPI_FLASH_NUM 2
-
-#endif
-
#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
@@ -8,16 +8,7 @@
#include "ls1088a_common.h"
-#ifdef CONFIG_TFABOOT
#define CONFIG_SYS_MMC_ENV_DEV 0
-#else
-#if defined(CONFIG_QSPI_BOOT)
-#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#else
-#define CONFIG_ENV_IS_IN_FLASH
-#endif
-#endif /* CONFIG_TFABOOT */
#if defined(CONFIG_TFABOOT) || \
defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
@@ -268,15 +259,6 @@
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#ifndef SPL_NO_QSPI
-/* QSPI device */
-#if defined(CONFIG_TFABOOT) || \
- defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define FSL_QSPI_FLASH_SIZE (1 << 26)
-#define FSL_QSPI_FLASH_NUM 2
-#endif
-#endif
-
#define CONFIG_CMD_MEMINFO
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
@@ -276,7 +276,6 @@ unsigned long get_board_ddr_clk(void);
#define I2C_MUX_CH_DEFAULT 0x8
/* SPI */
-#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
@@ -285,8 +284,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 26) /* 64MB */
-#define FSL_QSPI_FLASH_NUM 4
#endif
/*
* Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
@@ -295,8 +292,6 @@ unsigned long get_board_ddr_clk(void);
*/
#define FSL_QIXIS_BRDCFG9_QSPI 0x1
-#endif
-
/*
* MMC
*/
@@ -273,13 +273,9 @@ unsigned long get_board_sys_clk(void);
#define I2C_MUX_CH_DEFAULT 0x8
/* SPI */
-#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
-#ifdef CONFIG_FSL_DSPI
+#if defined(CONFIG_FSL_DSPI)
#define CONFIG_SPI_FLASH_STMICRO
#endif
-#define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */
-#define FSL_QSPI_FLASH_NUM 2
-#endif
/*
* RTC configuration
@@ -145,12 +145,6 @@
#define CONFIG_IMX_THERMAL
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_SIZE SZ_32M
-#define FSL_QSPI_FLASH_NUM 2
-#endif
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC3*/
@@ -175,17 +175,6 @@
#define CONFIG_IMX_THERMAL
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_LE
-#define CONFIG_SYS_FSL_QSPI_AHB
-#ifdef CONFIG_MX6SX_SABRESD_REVA
-#define FSL_QSPI_FLASH_SIZE SZ_16M
-#else
-#define FSL_QSPI_FLASH_SIZE SZ_32M
-#endif
-#define FSL_QSPI_FLASH_NUM 2
-#endif
-
#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_MXS
@@ -162,12 +162,6 @@
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_NUM 1
-#define FSL_QSPI_FLASH_SIZE SZ_32M
-#endif
-
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
@@ -160,10 +160,4 @@
#define CONFIG_SOFT_SPI
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_NUM 1
-#define FSL_QSPI_FLASH_SIZE SZ_32M
-#endif
-
#endif
@@ -154,12 +154,4 @@
#define CONFIG_VIDEO_BMP_LOGO
#endif
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_NUM 1
-#define FSL_QSPI_FLASH_SIZE SZ_64M
-#define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
-#define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
-#endif
-
#endif /* __CONFIG_H */
@@ -26,13 +26,6 @@
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-/* QSPI Configs*/
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE (SZ_16M)
-#define FSL_QSPI_FLASH_NUM 2
-#define CONFIG_SYS_FSL_QSPI_LE
-#endif
-
#define CONFIG_LOADADDR 0x82000000
@@ -43,14 +43,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
-/* QSPI Configs*/
-
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
-#define CONFIG_SYS_FSL_QSPI_LE
-#endif
-
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
@@ -597,7 +597,6 @@ CONFIG_FSL_SERDES
CONFIG_FSL_SERDES1
CONFIG_FSL_SERDES2
CONFIG_FSL_SGMII_RISER
-CONFIG_FSL_SPI_INTERFACE
CONFIG_FSL_TBCLK_EXTRA_DIV
CONFIG_FSL_TRUST_ARCH_v1
CONFIG_FSL_VIA
@@ -1542,7 +1541,6 @@ CONFIG_SET_BOOTARGS
CONFIG_SET_DFU_ALT_BUF_LEN
CONFIG_SET_DFU_ALT_INFO
CONFIG_SFIO
-CONFIG_SF_DATAFLASH
CONFIG_SGI_IP28
CONFIG_SH4_PCI
CONFIG_SH73A0
@@ -2604,12 +2602,9 @@ CONFIG_SYS_FSL_QBMAN_SIZE_1
CONFIG_SYS_FSL_QMAN_ADDR
CONFIG_SYS_FSL_QMAN_OFFSET
CONFIG_SYS_FSL_QMAN_V3
-CONFIG_SYS_FSL_QSPI_AHB
CONFIG_SYS_FSL_QSPI_BASE
CONFIG_SYS_FSL_QSPI_BASE1
CONFIG_SYS_FSL_QSPI_BASE2
-CONFIG_SYS_FSL_QSPI_BE
-CONFIG_SYS_FSL_QSPI_LE
CONFIG_SYS_FSL_QSPI_SIZE
CONFIG_SYS_FSL_QSPI_SIZE1
CONFIG_SYS_FSL_QSPI_SIZE2