From patchwork Fri Nov 9 15:26:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 150670 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp377630eds; Fri, 9 Nov 2018 07:34:59 -0800 (PST) X-Google-Smtp-Source: AJdET5dC/Rrdc0VKO+huwsOImnjIUK70ziqrlIkahg3RTaK1NMtLjXWRM+NJGehZbeErJtAQCgrB X-Received: by 2002:a50:90a7:: with SMTP id c36-v6mr2872947eda.31.1541777699573; Fri, 09 Nov 2018 07:34:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541777699; cv=none; d=google.com; s=arc-20160816; b=yXr3GbQ88yHpFbhjewLrlPdx0ByFy39XrysPa0LcC2Ypciz6J/nQEEU2I+F+jP53bh 8dqug7M1p42O9VOjIHNZsU2qEAvh6ACeitUp1N1wJBFX9YnlSU/Gy0LLVOkr+6VPc/ar gX25LrefcwiVX4S8bYYISxdKYep/quXYT/onVl6JuR41Zv3kSw3XwoPBq1v8PwMhMYRa LYBYY9LIVxCccY/3c/Lah7c1c67h9bfk/6pbtZkVseulUc84inlkmT97aUkdMyPnQxnA qhVzKU9KEkIUBKm3k8K4gDVExu1OiUf6yB0uegVc4NX/5IIqLwvwIJE8BAB1e6u1Ozew i82w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature; bh=WL69t2sM6JFEFtrn02+Q9wzFNXHOyYASCVfmSsjDTo8=; b=v24szH4A+37lGOGR7BpQPA9GOPw7/CIiwWpyoIm3fhsIywFcLJtyRZ7eNNQO7ja9et JToqIBAq5L3fVFDYBzfLqA1qRJjcG80cTWXF5k2iGbkEv55x93FqBoAI+TPYPmmrD8i/ 9/Z3UEgUudKO6SYK3Iw2Ha2Iy6H8KaYiekHpQxAUl/BGPmi45JKe7wBNW9AjJOftznSj 5fFSIzAAPgtQFX+Wjoo34sXOIEbrdZX+7T9Af3yeRSB24E0sSku9/4dRGOBukkBwGu8v Ycvo1FMPF6JGmzCzvL83FLTEkhhruJi9Dqqr6T90CZNixBZYYUNLiZM81vvkOQlicTCf t6PQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=CdJMgtwP; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id t24-v6si3921607edc.405.2018.11.09.07.34.58; Fri, 09 Nov 2018 07:34:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=CdJMgtwP; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 94CC8C225AE; Fri, 9 Nov 2018 15:33:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A79DEC225CE; Fri, 9 Nov 2018 15:27:26 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 8B25AC22594; Fri, 9 Nov 2018 15:27:15 +0000 (UTC) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by lists.denx.de (Postfix) with ESMTPS id A9BF6C225A3 for ; Fri, 9 Nov 2018 15:27:09 +0000 (UTC) Received: by mail-wm1-f67.google.com with SMTP id r63-v6so2391337wma.4 for ; Fri, 09 Nov 2018 07:27:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1I8t3Bda3keis/UqDRluQ3IKQgF2qM4zjn8NWvfByBY=; b=CdJMgtwP3uUjawm2NxvH7Ty0Y1LdCsQ40VN8FMFdPt7fUEcXrvPKgzgIhjXOcPLREp zuS2b4NlDMFulnKESjHRaIifAjdu4GKtNi2gIHrT0qyQ10zmQ/r0nJSc+q8/N8rYuOue JnJKV0UHO7L0o8szFHshVjyeIDDw14a7lZGFXpoE2jQ9JceRHwuoEeArOsqAEO0sVwN7 uV6LwN3n+moNatd2Fj3IG+E9m6KL15L9W0hpEhYh4vkv6j1/k+89hTE3yPuNx/4j0EjB I2rem02+s2GYbrE3aV+Pt/XH1eVCv0IQgN951VcWABCiwJ/Xj2ixsIfc0GzIDSaaKDgf 3omg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1I8t3Bda3keis/UqDRluQ3IKQgF2qM4zjn8NWvfByBY=; b=GpcDjmJ38JDiD9jemEixlxBYKRO62HBJt+vqOtdIl+FOR9ZJNt+KTf6sMRU5+SOVju mjN5S9ngfOb9EIjCkFdChFHlHWrihVVXISKvAHICnTguNXTQztKg31PY4V/XdZM4IZoq HEQkELmiCNnzR/X6REG5FQPHgTSsQgD0lntUq8n5L7yVzcE2PlxdBSR46IligLXoBp/t dLn0VzqbyWuV+Xw2IMNd1pyDKI61/QV5Km6hz6uV4rmJFe7Es9fm66g4L598rgP1+oWo FJUjfEo060JTgaFW1oaqSbii+r7G7VhtT1MftopPxArRLJ57e9RvfYlfpHuLxTbIylPc fzCA== X-Gm-Message-State: AGRZ1gI0YrGPiaxPxxMCGNGINI0HeSu8EOJhb2Q/8k8GzT3WCZTgWxv1 BFzWRSD6FzNFrBLx0B4iWtR+rUZIrvI= X-Received: by 2002:a7b:c183:: with SMTP id y3-v6mr4949209wmi.150.1541777228826; Fri, 09 Nov 2018 07:27:08 -0800 (PST) Received: from bender.baylibre.local ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id a127-v6sm1748545wmh.24.2018.11.09.07.27.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Nov 2018 07:27:08 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Fri, 9 Nov 2018 16:26:47 +0100 Message-Id: <1541777218-472-9-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1541777218-472-1-git-send-email-narmstrong@baylibre.com> References: <1541777218-472-1-git-send-email-narmstrong@baylibre.com> Cc: linux-amlogic@lists.infradead.org, trini@konsulko.com, Jerome Brunet Subject: [U-Boot] [PATCH u-boot 08/19] pinctrl: meson: rework gx pmx function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jerome Brunet In preparation of supporting the new Amlogix AGX SoCs, we need to move the Amlogic GX pinmux functions out of the common code to be able to add a different set of SoC specific pinmux functions for AXG. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 8 +- drivers/pinctrl/meson/Makefile | 1 + drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c | 97 ++++++++++++++++++++++++ drivers/pinctrl/meson/pinctrl-meson-gx.h | 48 ++++++++++++ drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 6 +- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 6 +- drivers/pinctrl/meson/pinctrl-meson.c | 109 ++++----------------------- drivers/pinctrl/meson/pinctrl-meson.h | 37 +++++---- 8 files changed, 191 insertions(+), 121 deletions(-) create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gx.h diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index 27ba890..15a8d9c 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -4,12 +4,16 @@ config PINCTRL_MESON depends on PINCTRL_GENERIC bool +config PINCTRL_MESON_GX_PMX + select PINCTRL_MESON + bool + config PINCTRL_MESON_GXBB bool "Amlogic Meson GXBB SoC pinctrl driver" - select PINCTRL_MESON + select PINCTRL_MESON_GX_PMX config PINCTRL_MESON_GXL bool "Amlogic Meson GXL SoC pinctrl driver" - select PINCTRL_MESON + select PINCTRL_MESON_GX_PMX endif diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile index 965092c..30b6875 100644 --- a/drivers/pinctrl/meson/Makefile +++ b/drivers/pinctrl/meson/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += pinctrl-meson.o +obj-$(CONFIG_PINCTRL_MESON_GX_PMX) += pinctrl-meson-gx-pmx.o obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c new file mode 100644 index 0000000..fc1538e --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 - Beniamino Galvani + */ + +#include +#include +#include +#include +#include +#include "pinctrl-meson-gx.h" + +static void meson_gx_pinmux_disable_other_groups(struct meson_pinctrl *priv, + unsigned int pin, + int sel_group) +{ + struct meson_pmx_group *group; + struct meson_gx_pmx_data *pmx_data; + void __iomem *addr; + int i, j; + + for (i = 0; i < priv->data->num_groups; i++) { + group = &priv->data->groups[i]; + pmx_data = (struct meson_gx_pmx_data *)group->data; + if (pmx_data->is_gpio || i == sel_group) + continue; + + for (j = 0; j < group->num_pins; j++) { + if (group->pins[j] == pin) { + /* We have found a group using the pin */ + debug("pinmux: disabling %s\n", group->name); + addr = priv->reg_mux + pmx_data->reg * 4; + writel(readl(addr) & ~BIT(pmx_data->bit), addr); + } + } + } +} + +static int meson_gx_pinmux_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int func_selector) +{ + struct meson_pinctrl *priv = dev_get_priv(dev); + const struct meson_pmx_group *group; + const struct meson_pmx_func *func; + struct meson_gx_pmx_data *pmx_data; + void __iomem *addr; + int i; + + group = &priv->data->groups[group_selector]; + pmx_data = (struct meson_gx_pmx_data *)group->data; + func = &priv->data->funcs[func_selector]; + + debug("pinmux: set group %s func %s\n", group->name, func->name); + + /* + * Disable groups using the same pins. + * The selected group is not disabled to avoid glitches. + */ + for (i = 0; i < group->num_pins; i++) { + meson_gx_pinmux_disable_other_groups(priv, + group->pins[i], + group_selector); + } + + /* Function 0 (GPIO) doesn't need any additional setting */ + if (func_selector) { + addr = priv->reg_mux + pmx_data->reg * 4; + writel(readl(addr) | BIT(pmx_data->bit), addr); + } + + return 0; +} + +const struct pinctrl_ops meson_gx_pinctrl_ops = { + .get_groups_count = meson_pinctrl_get_groups_count, + .get_group_name = meson_pinctrl_get_group_name, + .get_functions_count = meson_pinmux_get_functions_count, + .get_function_name = meson_pinmux_get_function_name, + .pinmux_group_set = meson_gx_pinmux_group_set, + .set_state = pinctrl_generic_set_state, +}; + +static const struct dm_gpio_ops meson_gx_gpio_ops = { + .set_value = meson_gpio_set, + .get_value = meson_gpio_get, + .get_function = meson_gpio_get_direction, + .direction_input = meson_gpio_direction_input, + .direction_output = meson_gpio_direction_output, +}; + +const struct driver meson_gx_gpio_driver = { + .name = "meson-gx-gpio", + .id = UCLASS_GPIO, + .probe = meson_gpio_probe, + .ops = &meson_gx_gpio_ops, +}; diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx.h b/drivers/pinctrl/meson/pinctrl-meson-gx.h new file mode 100644 index 0000000..4c1aa1a --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson-gx.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014 Beniamino Galvani + * Copyright (C) 2017 Jerome Brunet + */ + +#ifndef __PINCTRL_MESON_GX_H__ +#define __PINCTRL_MESON_GX_H__ + +#include "pinctrl-meson.h" + +struct meson_gx_pmx_data { + bool is_gpio; + unsigned int reg; + unsigned int bit; +}; + +#define PMX_DATA(r, b, g) \ + { \ + .reg = r, \ + .bit = b, \ + .is_gpio = g, \ + } + +#define GROUP(grp, r, b) \ + { \ + .name = #grp, \ + .pins = grp ## _pins, \ + .num_pins = ARRAY_SIZE(grp ## _pins), \ + .data = (const struct meson_gx_pmx_data[]){ \ + PMX_DATA(r, b, false), \ + }, \ + } + +#define GPIO_GROUP(gpio, b) \ + { \ + .name = #gpio, \ + .pins = (const unsigned int[]){ PIN(gpio, b) }, \ + .num_pins = 1, \ + .data = (const struct meson_gx_pmx_data[]){ \ + PMX_DATA(0, 0, true), \ + }, \ + } + +extern const struct pinctrl_ops meson_gx_pinctrl_ops; +extern const struct driver meson_gx_gpio_driver; + +#endif /* __PINCTRL_MESON_GX_H__ */ diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index a8e47e3..22e8b05 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -11,7 +11,7 @@ #include #include -#include "pinctrl-meson.h" +#include "pinctrl-meson-gx.h" #define EE_OFF 15 @@ -417,6 +417,7 @@ struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups), .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions), .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks), + .gpio_driver = &meson_gx_gpio_driver, }; struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { @@ -429,6 +430,7 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups), .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks), + .gpio_driver = &meson_gx_gpio_driver, }; static const struct udevice_id meson_gxbb_pinctrl_match[] = { @@ -449,5 +451,5 @@ U_BOOT_DRIVER(meson_gxbb_pinctrl) = { .of_match = of_match_ptr(meson_gxbb_pinctrl_match), .probe = meson_pinctrl_probe, .priv_auto_alloc_size = sizeof(struct meson_pinctrl), - .ops = &meson_pinctrl_ops, + .ops = &meson_gx_pinctrl_ops, }; diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index ba6e353..1819eee 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -11,7 +11,7 @@ #include #include -#include "pinctrl-meson.h" +#include "pinctrl-meson-gx.h" #define EE_OFF 11 @@ -699,6 +699,7 @@ struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), + .gpio_driver = &meson_gx_gpio_driver, }; struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { @@ -711,6 +712,7 @@ struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), + .gpio_driver = &meson_gx_gpio_driver, }; static const struct udevice_id meson_gxl_pinctrl_match[] = { @@ -731,5 +733,5 @@ U_BOOT_DRIVER(meson_gxl_pinctrl) = { .of_match = of_match_ptr(meson_gxl_pinctrl_match), .probe = meson_pinctrl_probe, .priv_auto_alloc_size = sizeof(struct meson_pinctrl), - .ops = &meson_pinctrl_ops, + .ops = &meson_gx_pinctrl_ops, }; diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 387c241..0bd6152 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -20,15 +20,15 @@ DECLARE_GLOBAL_DATA_PTR; static const char *meson_pinctrl_dummy_name = "_dummy"; -static int meson_pinctrl_get_groups_count(struct udevice *dev) +int meson_pinctrl_get_groups_count(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev); return priv->data->num_groups; } -static const char *meson_pinctrl_get_group_name(struct udevice *dev, - unsigned selector) +const char *meson_pinctrl_get_group_name(struct udevice *dev, + unsigned int selector) { struct meson_pinctrl *priv = dev_get_priv(dev); @@ -38,87 +38,21 @@ static const char *meson_pinctrl_get_group_name(struct udevice *dev, return priv->data->groups[selector].name; } -static int meson_pinmux_get_functions_count(struct udevice *dev) +int meson_pinmux_get_functions_count(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev); return priv->data->num_funcs; } -static const char *meson_pinmux_get_function_name(struct udevice *dev, - unsigned selector) +const char *meson_pinmux_get_function_name(struct udevice *dev, + unsigned int selector) { struct meson_pinctrl *priv = dev_get_priv(dev); return priv->data->funcs[selector].name; } -static void meson_pinmux_disable_other_groups(struct meson_pinctrl *priv, - unsigned int pin, int sel_group) -{ - struct meson_pmx_group *group; - void __iomem *addr; - int i, j; - - for (i = 0; i < priv->data->num_groups; i++) { - group = &priv->data->groups[i]; - if (group->is_gpio || i == sel_group) - continue; - - for (j = 0; j < group->num_pins; j++) { - if (group->pins[j] == pin) { - /* We have found a group using the pin */ - debug("pinmux: disabling %s\n", group->name); - addr = priv->reg_mux + group->reg * 4; - writel(readl(addr) & ~BIT(group->bit), addr); - } - } - } -} - -static int meson_pinmux_group_set(struct udevice *dev, - unsigned group_selector, - unsigned func_selector) -{ - struct meson_pinctrl *priv = dev_get_priv(dev); - const struct meson_pmx_group *group; - const struct meson_pmx_func *func; - void __iomem *addr; - int i; - - group = &priv->data->groups[group_selector]; - func = &priv->data->funcs[func_selector]; - - debug("pinmux: set group %s func %s\n", group->name, func->name); - - /* - * Disable groups using the same pins. - * The selected group is not disabled to avoid glitches. - */ - for (i = 0; i < group->num_pins; i++) { - meson_pinmux_disable_other_groups(priv, - group->pins[i], - group_selector); - } - - /* Function 0 (GPIO) doesn't need any additional setting */ - if (func_selector) { - addr = priv->reg_mux + group->reg * 4; - writel(readl(addr) | BIT(group->bit), addr); - } - - return 0; -} - -const struct pinctrl_ops meson_pinctrl_ops = { - .get_groups_count = meson_pinctrl_get_groups_count, - .get_group_name = meson_pinctrl_get_group_name, - .get_functions_count = meson_pinmux_get_functions_count, - .get_function_name = meson_pinmux_get_function_name, - .pinmux_group_set = meson_pinmux_group_set, - .set_state = pinctrl_generic_set_state, -}; - static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset, enum meson_reg_type reg_type, unsigned int *reg, unsigned int *bit) @@ -149,7 +83,7 @@ static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset, return 0; } -static int meson_gpio_get(struct udevice *dev, unsigned int offset) +int meson_gpio_get(struct udevice *dev, unsigned int offset) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -162,7 +96,7 @@ static int meson_gpio_get(struct udevice *dev, unsigned int offset) return !!(readl(priv->reg_gpio + reg) & BIT(bit)); } -static int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) +int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -177,7 +111,7 @@ static int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) return 0; } -static int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) +int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit, val; @@ -192,7 +126,7 @@ static int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) return (val & BIT(bit)) ? GPIOF_INPUT : GPIOF_OUTPUT; } -static int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) +int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -207,8 +141,8 @@ static int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) return 0; } -static int meson_gpio_direction_output(struct udevice *dev, - unsigned int offset, int value) +int meson_gpio_direction_output(struct udevice *dev, + unsigned int offset, int value) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); unsigned int reg, bit; @@ -229,7 +163,7 @@ static int meson_gpio_direction_output(struct udevice *dev, return 0; } -static int meson_gpio_probe(struct udevice *dev) +int meson_gpio_probe(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); struct gpio_dev_priv *uc_priv; @@ -241,21 +175,6 @@ static int meson_gpio_probe(struct udevice *dev) return 0; } -static const struct dm_gpio_ops meson_gpio_ops = { - .set_value = meson_gpio_set, - .get_value = meson_gpio_get, - .get_function = meson_gpio_get_direction, - .direction_input = meson_gpio_direction_input, - .direction_output = meson_gpio_direction_output, -}; - -static struct driver meson_gpio_driver = { - .name = "meson-gpio", - .id = UCLASS_GPIO, - .probe = meson_gpio_probe, - .ops = &meson_gpio_ops, -}; - static fdt_addr_t parse_address(int offset, const char *name, int na, int ns) { int index, len = 0; @@ -334,7 +253,7 @@ int meson_pinctrl_probe(struct udevice *dev) sprintf(name, "meson-gpio"); /* Create child device UCLASS_GPIO and bind it */ - device_bind(dev, &meson_gpio_driver, name, NULL, gpio, &gpio_dev); + device_bind(dev, priv->data->gpio_driver, name, NULL, gpio, &gpio_dev); dev_set_of_offset(gpio_dev, gpio); return 0; diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 6ec89ba..bdee721 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -12,9 +12,7 @@ struct meson_pmx_group { const char *name; const unsigned int *pins; unsigned int num_pins; - bool is_gpio; - unsigned int reg; - unsigned int bit; + const void *data; }; struct meson_pmx_func { @@ -33,6 +31,8 @@ struct meson_pinctrl_data { unsigned int num_groups; unsigned int num_funcs; unsigned int num_banks; + const struct driver *gpio_driver; + void *pmx_data; }; struct meson_pinctrl { @@ -89,23 +89,6 @@ struct meson_bank { #define PIN(x, b) (b + x) -#define GROUP(grp, r, b) \ - { \ - .name = #grp, \ - .pins = grp ## _pins, \ - .num_pins = ARRAY_SIZE(grp ## _pins), \ - .reg = r, \ - .bit = b, \ - } - -#define GPIO_GROUP(gpio, b) \ - { \ - .name = #gpio, \ - .pins = (const unsigned int[]){ PIN(gpio, b) }, \ - .num_pins = 1, \ - .is_gpio = true, \ - } - #define FUNCTION(fn) \ { \ .name = #fn, \ @@ -131,6 +114,20 @@ struct meson_bank { extern const struct pinctrl_ops meson_pinctrl_ops; +int meson_pinctrl_get_groups_count(struct udevice *dev); +const char *meson_pinctrl_get_group_name(struct udevice *dev, + unsigned int selector); +int meson_pinmux_get_functions_count(struct udevice *dev); +const char *meson_pinmux_get_function_name(struct udevice *dev, + unsigned int selector); int meson_pinctrl_probe(struct udevice *dev); +int meson_gpio_get(struct udevice *dev, unsigned int offset); +int meson_gpio_set(struct udevice *dev, unsigned int offset, int value); +int meson_gpio_get_direction(struct udevice *dev, unsigned int offset); +int meson_gpio_direction_input(struct udevice *dev, unsigned int offset); +int meson_gpio_direction_output(struct udevice *dev, unsigned int offset, + int value); +int meson_gpio_probe(struct udevice *dev); + #endif /* __PINCTRL_MESON_H__ */