From patchwork Tue Jun 19 07:11:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 139098 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp4862620lji; Tue, 19 Jun 2018 00:16:25 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIGRFuuaYq2OFlWS8/femdteTOqQ93ABKY5kM87Vvgx++C5rJzIH8Sd1f0dag4Bex+XR2mZ X-Received: by 2002:a50:d55e:: with SMTP id f30-v6mr13582441edj.73.1529392585550; Tue, 19 Jun 2018 00:16:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529392585; cv=none; d=google.com; s=arc-20160816; b=WzAYC5fBb9fPsC5xjNBgl5eVseMgHJY1pl8NLKC7vyZBMqqoRkSS4mSfZh3lnfVUg3 bpAhb/vhOkoZF09zgsOdpYhJxlUAt0q2gsuvIxs06yi2lKU10k4zKg2SGzpBVu+GOVpM R8xWycbML53dN6MfvnRYFqjsd8yNwYPIQPWka0u8qXsroar8Htih7R3UNf1sOJ30n8UO lpvszTf1I48f0AFHVnu16giugyPuDmPl2B7ztXjnuNvvCyQZqNq5n9OovtHHNHsaYClP 7OpegUbdyi2/pIIYZxtE4MdXsYVTZwScUj6eIk+ExFHuy8v2Ii5f0YCv7bwyiYMZuGSz pbXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=/Z1B0mdyYZsf94bx4MD5jzsMtnJdcaNRJvbMRN5B4BY=; b=eBaCdDVlwFHVSqUTdJ6hoy7N8yNsyqZhxoHH5tKjnzcCxaSHHMnEdyj2pHqF2Btf9f 1XhxYAR4XKDEyTgGxy6ctLJC36yQFL+5c1dUe5EdHXMTzEC5BRz7fguDn21Z1b0yBvcr i2Kmm8Ko7t2xR+7epidPxIhY6m/49tYcYAzTF56um7aRdINoLBTG1WidaaGe9QtuVdI/ roNGp40NR360b4Iy0btjddgQGz1RBX0QM89uIz0QJ3s2V9bXxmcJUNcREhHiw4ubdiVZ EhSSd+xh3Rz8WdCUzuboMY/GL3elfZEde45F3J+X9Hcrk+4gLnfX6CtJWrgrJFO/Ppe7 /JTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=LsN5gauv; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id c5-v6si6503425edf.296.2018.06.19.00.16.25; Tue, 19 Jun 2018 00:16:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=LsN5gauv; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 2DBE7C21FAB; Tue, 19 Jun 2018 07:13:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3A488C21FBC; Tue, 19 Jun 2018 07:13:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A12D5C21F99; Tue, 19 Jun 2018 07:12:20 +0000 (UTC) Received: from conuserg-09.nifty.com (conuserg-09.nifty.com [210.131.2.76]) by lists.denx.de (Postfix) with ESMTPS id 2AF4EC21FC5 for ; Tue, 19 Jun 2018 07:12:13 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id w5J7BnbG015508; Tue, 19 Jun 2018 16:11:51 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com w5J7BnbG015508 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1529392312; bh=H6QcWzDYI3RUT96Lyh5NgzDus9OD/jmHpM7ql3t+z6s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LsN5gauvKvNZEAGRKA4qVzmTF5HoFpHHW2dQZHXizZO43LjparduKmdvnHcqCr9Um IRtD0HBmIyA1YVn/T78gEFMkENVS9H9g27+x9/Jgwdr0vte9SQEankcELHG5cYT4Zc Q+9RdSyuyFfx+MbyqVQszDZWVl4NIWIggCEllPQdFiRSY46h/5ronH11q4vDO6Qu8z HjoVGmlF3lS1AupfYs+iHrxTcngNuAwgMcg2RdNfeBMoGbIxNad+xXOmMdr9OReQWp A7JzaOWmeZNxNC6BdMN/t53sY+OTBM/Xr2T2wjBA6eeWr4ZE03LFUVLirNCq59+6qc AIOv7SGOxfMoQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 19 Jun 2018 16:11:46 +0900 Message-Id: <1529392307-26656-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529392307-26656-1-git-send-email-yamada.masahiro@socionext.com> References: <1529392307-26656-1-git-send-email-yamada.masahiro@socionext.com> Cc: Jagan Teki , Tom Rini Subject: [U-Boot] [PATCH 5/6] ARM: dts: uniphier: sync DT with Linux 4.18-rc1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that the clock-frequency information has been moved to the driver, more DT sync is possible. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11.dtsi | 4 ---- arch/arm/dts/uniphier-ld20.dtsi | 4 ---- arch/arm/dts/uniphier-ld4.dtsi | 4 ---- arch/arm/dts/uniphier-pro4.dtsi | 6 +----- arch/arm/dts/uniphier-pro5.dtsi | 4 ---- arch/arm/dts/uniphier-pxs2.dtsi | 4 ---- arch/arm/dts/uniphier-pxs3.dtsi | 4 ---- arch/arm/dts/uniphier-sld8.dtsi | 4 ---- 8 files changed, 1 insertion(+), 33 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index e7514f0..3f9237c 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -124,7 +124,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <58820000>; resets = <&peri_rst 0>; }; @@ -136,7 +135,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <58820000>; resets = <&peri_rst 1>; }; @@ -148,7 +146,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <58820000>; resets = <&peri_rst 2>; }; @@ -160,7 +157,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <58820000>; resets = <&peri_rst 3>; }; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 31bc124..6ffbf18 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -230,7 +230,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <58820000>; resets = <&peri_rst 0>; }; @@ -242,7 +241,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <58820000>; resets = <&peri_rst 1>; }; @@ -254,7 +252,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <58820000>; resets = <&peri_rst 2>; }; @@ -266,7 +263,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <58820000>; resets = <&peri_rst 3>; }; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index 5e43a92..4545056 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -71,7 +71,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <36864000>; resets = <&peri_rst 0>; }; @@ -83,7 +82,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <36864000>; resets = <&peri_rst 1>; }; @@ -95,7 +93,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <36864000>; resets = <&peri_rst 2>; }; @@ -107,7 +104,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <36864000>; resets = <&peri_rst 3>; }; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 0004863..8185b54 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -79,7 +79,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <73728000>; resets = <&peri_rst 0>; }; @@ -91,7 +90,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <73728000>; resets = <&peri_rst 1>; }; @@ -103,7 +101,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <73728000>; resets = <&peri_rst 2>; }; @@ -115,7 +112,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <73728000>; resets = <&peri_rst 3>; }; @@ -429,7 +425,7 @@ pinctrl-0 = <&pinctrl_ether_rgmii>; clock-names = "gio", "ether", "ether-gb", "ether-phy"; clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, - <&sys_clk 10>; + <&sys_clk 10>; reset-names = "gio", "ether"; resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 32debf5..6aea9af 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -164,7 +164,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <73728000>; resets = <&peri_rst 0>; }; @@ -176,7 +175,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <73728000>; resets = <&peri_rst 1>; }; @@ -188,7 +186,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <73728000>; resets = <&peri_rst 2>; }; @@ -200,7 +197,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <73728000>; resets = <&peri_rst 3>; }; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 20f3935..f4101c0 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -172,7 +172,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <88900000>; resets = <&peri_rst 0>; }; @@ -184,7 +183,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <88900000>; resets = <&peri_rst 1>; }; @@ -196,7 +194,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <88900000>; resets = <&peri_rst 2>; }; @@ -208,7 +205,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <88900000>; resets = <&peri_rst 3>; }; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index ae867cb..cfeeecd 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -152,7 +152,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <58820000>; resets = <&peri_rst 0>; }; @@ -164,7 +163,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <58820000>; resets = <&peri_rst 1>; }; @@ -176,7 +174,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <58820000>; resets = <&peri_rst 2>; }; @@ -188,7 +185,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <58820000>; resets = <&peri_rst 3>; }; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index 67d6977..f20926e 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -71,7 +71,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; - clock-frequency = <80000000>; resets = <&peri_rst 0>; }; @@ -83,7 +82,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; - clock-frequency = <80000000>; resets = <&peri_rst 1>; }; @@ -95,7 +93,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; - clock-frequency = <80000000>; resets = <&peri_rst 2>; }; @@ -107,7 +104,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; - clock-frequency = <80000000>; resets = <&peri_rst 3>; };