From patchwork Fri Apr 20 09:14:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 133861 Delivered-To: patch@linaro.org Received: by 10.46.66.142 with SMTP id h14csp44607ljf; Fri, 20 Apr 2018 02:17:17 -0700 (PDT) X-Google-Smtp-Source: AIpwx48kZwju5PCWjAS90nuQY16GZ3ueGKc6jfaSTFSvTmjgKZzH3GqLKe16IPHyzUSK8KMtjJFX X-Received: by 10.80.142.207 with SMTP id x15mr13023868edx.128.1524215837748; Fri, 20 Apr 2018 02:17:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524215837; cv=none; d=google.com; s=arc-20160816; b=La0nvikFIMsTs8+1jQc4nqMqU04fnc8kVQRUcy/Oa0anaqyG1qccpN2WaLA901wTfp j0CJOwII7C/Ii0vjdsS+huKoBF0UvZOxFgsEXsMza8urAmIMZB8DyIH0n8q7YL+r+Cru Uc4/cPxFjjXzF6Jft+eNe1LTAm52c5sywznu+PS3ZNCEHlk9mKtUuDlCA0yMovx7vs9H pH+iQ1CvIfvPaHnYQGq+T6N9kZxcHy7+W805RTpRVD6F2MV2FAffzTBZjd/8s03RynnF XESltbbdNOP3LybBq8AozqdDuZp2vPxEXXofjjnjKIYRdxg+uMARCHOQvi+hkHiYdai5 ++DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=Eh5li/0MhpAuTiOBfLqGU0U/FTQaJmHPWBmnRixw8Z0=; b=PhYJfqfl3QMU++qyqOxfEOlcnCNS9bnaN6TH4EcycceumJlx6psWOM4dO/HJmfX8Td VqGD8Nnp+x640aJIkSdaQBdDJL/+NZEe6/zfI6wPnZCJyXopzHw1APretxDBTQUuAQab 1lBDXXrJl/s+YAJPn8OjNoea1ePSJ846wODZWQpvAiKuhIkbXQpahA4a87M6kFMOcXkx aAllVnKoesj/3AEHrAJLKb6pQe1Rp19WX4SSGNbVpdPk/jfQhRniQR0uS2ZkdEqnAlDu Zz5X+OMO0KUGVXRJb83UBa1CcViL7A1H4fOK6y8qRHnbl8PxkNro36bmAK+J+MUHVTUr ZFDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=Fi1tk8Mm; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id x4si5056205edd.359.2018.04.20.02.17.17; Fri, 20 Apr 2018 02:17:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=Fi1tk8Mm; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 4D7F7C22002; Fri, 20 Apr 2018 09:16:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A4AF6C22044; Fri, 20 Apr 2018 09:15:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C3665C21E79; Fri, 20 Apr 2018 09:15:01 +0000 (UTC) Received: from conuserg-09.nifty.com (conuserg-09.nifty.com [210.131.2.76]) by lists.denx.de (Postfix) with ESMTPS id 7D353C21FFE for ; Fri, 20 Apr 2018 09:15:00 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id w3K9ESOp030098; Fri, 20 Apr 2018 18:14:29 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com w3K9ESOp030098 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1524215669; bh=q8s/nBIhn6pzjQryY4IPZrjkenK920WckUKz0usr/vw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fi1tk8MmbUZqzHC+a+Eg1MzoCWyW+ENPl7gLS1s0KfseatOzhUWTOoMpCHMKwvpi6 /CdRUa34KXjhrQpz0VI9rytich9eQY//Z1zrFqEARCRYgCeawx7+7m5ZUglNyYu9/y WzCD6ETAk58KFZM6isBto+EXyo7TrY4aERY4cLGVX3B24jY9jIriyHBp4YpdX6ANAX IOaXlAZ3bTl8s7Ru59eBQZPcr+VVJ6XFKrTtVjgL2eVdt076ZrBbQC1eXQgwYziUMY BK38kVN85ncjtXs5uuegx596+JUJxd6nd8vvz/IGSUPhFG2S4x9gPBuOO+3TMdOcZ3 W0w4tTip0P8AQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 20 Apr 2018 18:14:24 +0900 Message-Id: <1524215667-32112-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1524215667-32112-1-git-send-email-yamada.masahiro@socionext.com> References: <1524215667-32112-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 1/4] mmc: tmio: move clk_enable() to each driver's probe function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" I need to differentiate the clock handling for uniphier-sd. Move it to each driver's probe function from the tmio common code so that renesas-sdhi will not be affected. Signed-off-by: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 23 +++++++++++++++++++++++ drivers/mmc/tmio-common.c | 22 ---------------------- drivers/mmc/uniphier-sd.c | 25 +++++++++++++++++++++++++ 3 files changed, 48 insertions(+), 22 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 56a43ca..8e49b2f 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -330,8 +330,10 @@ static const struct udevice_id renesas_sdhi_match[] = { static int renesas_sdhi_probe(struct udevice *dev) { + struct tmio_sd_priv *priv = dev_get_priv(dev); u32 quirks = dev_get_driver_data(dev); struct fdt_resource reg_res; + struct clk clk; DECLARE_GLOBAL_DATA_PTR; int ret; @@ -348,6 +350,27 @@ static int renesas_sdhi_probe(struct udevice *dev) quirks |= TMIO_SD_CAP_16BIT; } + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { + dev_err(dev, "failed to get host clock\n"); + return ret; + } + + /* set to max rate */ + priv->mclk = clk_set_rate(&clk, ULONG_MAX); + if (IS_ERR_VALUE(priv->mclk)) { + dev_err(dev, "failed to set rate for host clock\n"); + clk_free(&clk); + return priv->mclk; + } + + ret = clk_enable(&clk); + clk_free(&clk); + if (ret) { + dev_err(dev, "failed to enable host clock\n"); + return ret; + } + ret = tmio_sd_probe(dev, quirks); #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) if (!ret) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 5f1c9c0..4ea6612 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -713,7 +713,6 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks) struct tmio_sd_priv *priv = dev_get_priv(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); fdt_addr_t base; - struct clk clk; int ret; base = devfdt_get_addr(dev); @@ -728,27 +727,6 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks) device_get_supply_regulator(dev, "vqmmc-supply", &priv->vqmmc_dev); #endif - ret = clk_get_by_index(dev, 0, &clk); - if (ret < 0) { - dev_err(dev, "failed to get host clock\n"); - return ret; - } - - /* set to max rate */ - priv->mclk = clk_set_rate(&clk, ULONG_MAX); - if (IS_ERR_VALUE(priv->mclk)) { - dev_err(dev, "failed to set rate for host clock\n"); - clk_free(&clk); - return priv->mclk; - } - - ret = clk_enable(&clk); - clk_free(&clk); - if (ret) { - dev_err(dev, "failed to enable host clock\n"); - return ret; - } - ret = mmc_of_parse(dev, &plat->cfg); if (ret < 0) { dev_err(dev, "failed to parse host caps\n"); diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 47379b0..bc6e41d 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -32,6 +32,31 @@ static const struct udevice_id uniphier_sd_match[] = { static int uniphier_sd_probe(struct udevice *dev) { + struct tmio_sd_priv *priv = dev_get_priv(dev); + struct clk clk; + int ret; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { + dev_err(dev, "failed to get host clock\n"); + return ret; + } + + /* set to max rate */ + priv->mclk = clk_set_rate(&clk, ULONG_MAX); + if (IS_ERR_VALUE(priv->mclk)) { + dev_err(dev, "failed to set rate for host clock\n"); + clk_free(&clk); + return priv->mclk; + } + + ret = clk_enable(&clk); + clk_free(&clk); + if (ret) { + dev_err(dev, "failed to enable host clock\n"); + return ret; + } + return tmio_sd_probe(dev, 0); }