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Fri, 5 Jan 2018 07:38:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 33459C21DD9; Fri, 5 Jan 2018 07:37:43 +0000 (UTC) Received: from mail-pg0-f68.google.com (mail-pg0-f68.google.com [74.125.83.68]) by lists.denx.de (Postfix) with ESMTPS id 85CE2C21E16 for ; Fri, 5 Jan 2018 07:37:42 +0000 (UTC) Received: by mail-pg0-f68.google.com with SMTP id t67so1725141pgc.5 for ; Thu, 04 Jan 2018 23:37:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hktDAHNZharS8aE32qKIEZ3nQ+nD8CQVpxghBFlGQbA=; b=DFKCYIgrFzELINt4SKHeAa+zSEelh+njAglVzZfZZRcS9cDfC6AeKfasYxMzRd6l6n hlQQp5T07kDpsbxrkD8A6kJ9YEvDYIqX9PUHgTiyAo+57s2IF068FCYZWaHFI2yaEGR7 cE8WiZ+Dtc7zyh15BxmzPPbhraD6Ta8w6+l4c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hktDAHNZharS8aE32qKIEZ3nQ+nD8CQVpxghBFlGQbA=; b=oQg4Wu5+oOfc+VtUxXtj8j4UjiBdomVtwI9Vr3yJc82I5Vxd1m//YnWuikQSCCTBTH qx3fwH1ASzb2v2rTWGBAo/t9zYx07p2iJT2IhZ0yQKuajDncFH5v8ptfS2Q55tJb2XUE 13jDaU3EIknxsS9JBiz0xNtUwHfzQCgRqcNbd4JLKH2MDcNyxrs9YJ1CbzrvkZ3FV+Ib mcAnnogpMWcmzuobybDVYvtmfoVwIv3EgZR0HhMN1covJROAEZuG+6LUle3sFT6+LP5I lpOSaty0PD1v6/d3aPlS+Zc6/vq/OR64GO7XzTA9bBkx1TqAq1jpyJGglAQRquXDHrq0 TXSA== X-Gm-Message-State: AKGB3mL/JoaeeMA4JUihnOQhO95uu1qGryD6K+050yNO26f5bjWFK+ho zzuUpOhTZXEDB/KCfsFyxxVXwQ== X-Received: by 10.98.15.203 with SMTP id 72mr2118120pfp.104.1515137861247; Thu, 04 Jan 2018 23:37:41 -0800 (PST) Received: from localhost.localdomain ([45.56.153.113]) by smtp.gmail.com with ESMTPSA id b9sm9553789pgs.3.2018.01.04.23.37.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Jan 2018 23:37:40 -0800 (PST) From: Jun Nie To: wens@csie.org, maxime.ripard@free-electrons.com, hdegoede@redhat.com Date: Fri, 5 Jan 2018 15:36:58 +0800 Message-Id: <1515137821-30583-4-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1515137821-30583-1-git-send-email-jun.nie@linaro.org> References: <1515137821-30583-1-git-send-email-jun.nie@linaro.org> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 3/6] sunxi: musb: Enable OTG device clock for H3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable OTG clock and deassert reset Signed-off-by: Jun Nie --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 2 ++ arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++++ drivers/usb/musb-new/sunxi.c | 19 +++++++++++++++++++ 3 files changed, 25 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d328df9..0d81791 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -280,6 +280,8 @@ struct sunxi_ccm_reg { #define AHB_GATE_OFFSET_USB_EHCI2 27 #define AHB_GATE_OFFSET_USB_EHCI1 26 #define AHB_GATE_OFFSET_USB_EHCI0 25 +#define AHB_GATE_OFFSET_OTG_EHCI 24 +#define AHB_GATE_OFFSET_OTG_DEVICE 23 #else #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 2419062..f7050df 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -64,7 +64,11 @@ #ifdef CONFIG_SUNXI_GEN_SUN6I #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) #define SUNXI_USBPHY_BASE 0x01c19000 +#ifndef CONFIG_USB_MUSB_HOST +#define SUNXI_USB0_BASE 0x01c19000 +#else #define SUNXI_USB0_BASE 0x01c1a000 +#endif #define SUNXI_USB1_BASE 0x01c1b000 #define SUNXI_USB2_BASE 0x01c1c000 #define SUNXI_USB3_BASE 0x01c1d000 diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 0005c1e..6d8242e 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -266,6 +266,16 @@ static int sunxi_musb_init(struct musb *musb) #ifdef CONFIG_SUNXI_GEN_SUN6I setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); #endif + +#ifdef CONFIG_MACH_SUNXI_H3_H5 +#ifdef CONFIG_USB_MUSB_HOST + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_EHCI); + setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_EHCI); +#else + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE); + setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_DEVICE); +#endif +#endif sunxi_usb_phy_init(0); USBC_ConfigFIFO_Base(); @@ -379,6 +389,15 @@ static int musb_usb_remove(struct udevice *dev) #endif clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); +#ifdef CONFIG_MACH_SUNXI_H3_H5 +#ifdef CONFIG_USB_MUSB_HOST + clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_EHCI); + clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_EHCI); +#else + clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE); + clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_DEVICE); +#endif +#endif free(host->host); host->host = NULL;