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[3/6] sunxi: musb: Enable OTG device clock for H3

Message ID 1515137821-30583-4-git-send-email-jun.nie@linaro.org
State New
Headers show
Series Add Bananapi Zero board with OTG supported | expand

Commit Message

Jun Nie Jan. 5, 2018, 7:36 a.m. UTC 
Enable OTG clock and deassert reset

Signed-off-by: Jun Nie <jun.nie@linaro.org>
---
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h |  2 ++
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h   |  4 ++++
 drivers/usb/musb-new/sunxi.c                  | 19 +++++++++++++++++++
 3 files changed, 25 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index d328df9..0d81791 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -280,6 +280,8 @@  struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB_EHCI2	27
 #define AHB_GATE_OFFSET_USB_EHCI1	26
 #define AHB_GATE_OFFSET_USB_EHCI0	25
+#define AHB_GATE_OFFSET_OTG_EHCI	24
+#define AHB_GATE_OFFSET_OTG_DEVICE	23
 #else
 #define AHB_GATE_OFFSET_USB_EHCI1	27
 #define AHB_GATE_OFFSET_USB_EHCI0	26
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 2419062..f7050df 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -64,7 +64,11 @@ 
 #ifdef CONFIG_SUNXI_GEN_SUN6I
 #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
 #define SUNXI_USBPHY_BASE		0x01c19000
+#ifndef CONFIG_USB_MUSB_HOST
+#define SUNXI_USB0_BASE			0x01c19000
+#else
 #define SUNXI_USB0_BASE			0x01c1a000
+#endif
 #define SUNXI_USB1_BASE			0x01c1b000
 #define SUNXI_USB2_BASE			0x01c1c000
 #define SUNXI_USB3_BASE			0x01c1d000
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 0005c1e..6d8242e 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -266,6 +266,16 @@  static int sunxi_musb_init(struct musb *musb)
 #ifdef CONFIG_SUNXI_GEN_SUN6I
 	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
 #endif
+
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+#ifdef CONFIG_USB_MUSB_HOST
+	setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_EHCI);
+	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_EHCI);
+#else
+	setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE);
+	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_DEVICE);
+#endif
+#endif
 	sunxi_usb_phy_init(0);
 
 	USBC_ConfigFIFO_Base();
@@ -379,6 +389,15 @@  static int musb_usb_remove(struct udevice *dev)
 #endif
 	clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
 
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+#ifdef CONFIG_USB_MUSB_HOST
+	clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_EHCI);
+	clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_EHCI);
+#else
+	clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_OTG_DEVICE);
+	clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_OTG_DEVICE);
+#endif
+#endif
 	free(host->host);
 	host->host = NULL;