From patchwork Tue Nov 21 17:38:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 119385 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp5577799qgn; Tue, 21 Nov 2017 09:50:24 -0800 (PST) X-Google-Smtp-Source: AGs4zMarffdM3ua0d5/9Fc4ShnJk9wJcc3C5Ac8/ZydOwce8YE7IgW+fu9Y+v9PCxO4+OWChc7HN X-Received: by 10.80.214.74 with SMTP id c10mr7886696edj.271.1511286624164; Tue, 21 Nov 2017 09:50:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511286624; cv=none; d=google.com; s=arc-20160816; b=N6dCsBi9v+PcGEDzQaK/iWnbbEktoc3dLVtR0VcpZmDO4H6SEvzCSknh/e66T+v3N3 fDh5ccmVKnisf5dlPSSYXxZEclL3B3Ndu1GBdulNAP7tm88bb1y3ExscrNKk5aFlh0qD Wo/5Mkw1zH42O4oPeT1Y84ipu7MUBphOUvoEFLYf/0GbnRXGBjov2Kdu5rNcvPN8Dlgb eRe1aaHxycM7iM3Ut+dMWT0Rg9rC6GWxXObJET/Q3vVSChh6SDvFr8K+gekESO4cJpzT k6SbM+hmUom2DwBBzgy/j5wtLc6oIDjDwE4DD6ACeDFgobHmo/JIlOtiqKEQtIse92dK jNwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=3XptSt+RFTgz+CeXo84XAwFirSfX5kohizaJ82xBdJs=; b=yLMxp28lf3WFTWldnAD3zVDngpS/E5yGi7e3fYjBga5FfzfyRrPyBoz5Kyey6x40qM xhBX1uVKwAX+nU48kZI3pxphGWCJoip7SNFs3vSgtV5jCJ49EIjtz4PWaYyp0aaXDxo8 EKws8h2KWHtbPsy4yhTC5FwbMUtM5IamWrSJp3u0ogwDcW9S1n3ck2mg3l+U6wluquSk 5BrPvXfbJcc4JizK8ANXpfK0w5nofJWqJNC4sR02Jx1gdnd6Y4sIBCfL8RHVzUHXToVW JETwzvuSKE24zruayGrI9sLUyqiYGELWzG+l4bX2e8Y6Bx1M0RQZmCvPTkA+X+wTn2CQ x8ow== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=E+aCzr7b; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id i42si864093ede.137.2017.11.21.09.50.23; Tue, 21 Nov 2017 09:50:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=E+aCzr7b; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id ABF62C21E4B; Tue, 21 Nov 2017 17:47:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 036F8C21FC4; Tue, 21 Nov 2017 17:39:37 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01E87C21F0F; Tue, 21 Nov 2017 17:39:07 +0000 (UTC) Received: from conuserg-07.nifty.com (conuserg-07.nifty.com [210.131.2.74]) by lists.denx.de (Postfix) with ESMTPS id 24C98C21F47 for ; Tue, 21 Nov 2017 17:39:03 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-07.nifty.com with ESMTP id vALHcbu6001225; Wed, 22 Nov 2017 02:38:44 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com vALHcbu6001225 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1511285924; bh=YWDOqS+PC/d5dcFnkQ1TiGx3cgHLxYJ3xQITDtHWUc0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E+aCzr7bie5b7zbBDp/GHurq5TRxc/Io4sM+LVDqc1Pap1HacFXSkyXlWwbRF4drj YMQwMstC4Zp9zg5ilimReHm+Q1cmMWKJDDDCbvcn/o3NSAjq76kC1Yu0r6qP87JHkq o7AOMkkTT0nvVFcNZO9Gj62rI15S+fAaTHW122krJGneyk//4LqJLGCyxBMSK/AM7U 5a0cU58V6XXHuamwrtv2lCmJPZWXrn+nUtk/qzgU0TO1IBC04jh5JqG6IQeuiN6RF1 SvyiHKnPyd2KLkXFjh2soYEPAfgjm8pMMErshibhhRq5BrIy1YjB6kqGo/k6s3VGR2 CkwqNDXFM1ywA== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Wed, 22 Nov 2017 02:38:26 +0900 Message-Id: <1511285912-12452-17-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511285912-12452-1-git-send-email-yamada.masahiro@socionext.com> References: <1511285912-12452-1-git-send-email-yamada.masahiro@socionext.com> Cc: Scott Wood Subject: [U-Boot] [PATCH 16/22] mtd: nand: Wait for PAGEPROG to finish in drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Boris Brezillon Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the full read/write page sequence, and waiting for a page to actually be programmed is part of this write-page sequence. This is also what is done in ->write_oob_xxx() hooks, so let's do that in ->write_page_xxx() as well to make it consistent. Signed-off-by: Boris Brezillon [Linux commit: 41145649f4acb30249b636b945053db50c9331c5] [masahiro: There is no driver setting NAND_ECC_CUSTOM_PAGE_ACCESS in U-Boot. No driver is affected by this change.] Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/nand_base.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 91afa47..16d4554 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2439,12 +2439,13 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, if (status < 0) return status; - if (nand_standard_page_accessors(&chip->ecc)) + if (nand_standard_page_accessors(&chip->ecc)) { chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); - status = chip->waitfunc(mtd, chip); - if (status & NAND_STATUS_FAIL) - return -EIO; + status = chip->waitfunc(mtd, chip); + if (status & NAND_STATUS_FAIL) + return -EIO; + } return 0; }