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[81.169.180.215]) by mx.google.com with ESMTP id v10si222729edf.238.2017.10.12.20.48.13; Thu, 12 Oct 2017 20:48:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=o957DfSr; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: by lists.denx.de (Postfix, from userid 105) id EA02AC21FAC; Fri, 13 Oct 2017 03:48:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id ED650C21FAA; Fri, 13 Oct 2017 03:48:01 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6C33FC21FD1; Fri, 13 Oct 2017 03:47:55 +0000 (UTC) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by lists.denx.de (Postfix) with ESMTPS id 14531C21FB9 for ; Fri, 13 Oct 2017 03:47:51 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v9D3loBY027032; Thu, 12 Oct 2017 22:47:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1507866470; bh=UFA/Ok2h7Pas58hcQiaelxD3UrD/LUHra83nRATv1vU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=o957DfSrQaEXvoTm7p9eWINPel9nASYKHuyA9cNvQXFnvXBdNXRnHix51bCz+mSdo 59fN4ZtqcuUNsGiUYf2xdFBYrdPjUgFpiwvHWLQzykLyHcLNz2da7jefgeXcWe1bFN y9DykhIViTiH6nVi6kQyZCONd/cWz8o4do5xsr98= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9D3loRG003458; Thu, 12 Oct 2017 22:47:50 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 12 Oct 2017 22:47:49 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 12 Oct 2017 22:47:49 -0500 Received: from droidlinux (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9D3ln34008995; Thu, 12 Oct 2017 22:47:49 -0500 Received: from praneeth by droidlinux with local (Exim 4.82) (envelope-from ) id 1e2qwv-0002pU-Kp; Thu, 12 Oct 2017 22:47:49 -0500 From: Praneeth Bajjuri To: Praneeth Bajjuri , Date: Thu, 12 Oct 2017 22:47:05 -0500 Message-ID: <1507866425-10827-4-git-send-email-praneeth@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1507866425-10827-1-git-send-email-praneeth@ti.com> References: <1507866425-10827-1-git-send-email-praneeth@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Tom Rini Subject: [U-Boot] [PATCH 4/4] arm: dra76: fastboot: extend cpu type for getvar command X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" 'commit fa24eca1f20a ("omap: Add routine for setting fastboot variables")' adds initial support and usage of "fastboot getvar" command for DRA75x and DRA72x devices. and 'commit 0f9e6aee9dbc ("arm: dra76: Add support for ES1.0 detection")' adds initial dra76 device definition This patch is to extend usage of "fastboot getvar" for DRA76 device. Signed-off-by: Praneeth Bajjuri Reviewed-by: Tom Rini --- arch/arm/mach-omap2/utils.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c index 2bd8290..2e87780 100644 --- a/arch/arm/mach-omap2/utils.c +++ b/arch/arm/mach-omap2/utils.c @@ -26,6 +26,9 @@ static void omap_set_fastboot_cpu(void) u32 cpu_rev = omap_revision(); switch (cpu_rev) { + case DRA762_ES1_0: + cpu = "DRA762"; + break; case DRA752_ES1_0: case DRA752_ES1_1: case DRA752_ES2_0: