From patchwork Thu Sep 21 14:30:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 113263 Delivered-To: patch@linaro.org Received: by 10.80.163.150 with SMTP id s22csp1965222edb; Thu, 21 Sep 2017 07:41:22 -0700 (PDT) X-Google-Smtp-Source: AOwi7QA38uAy8+gsB3jXdSNtnOx6qdqf+IP9YeMoRMpfiMnPNnWkUCbnIfcq52WUIhjQUVOy6956 X-Received: by 10.80.159.36 with SMTP id b33mr1381466edf.163.1506004882762; Thu, 21 Sep 2017 07:41:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506004882; cv=none; d=google.com; s=arc-20160816; b=SFfXMKLXgkTrCoecyS3FTRpr3XuIuhLabHba4Xgp0t3wAFNmEm06285JzTPVLFj/E8 9bYvcD8bbi6MGAFuoYAFHLiphb6NbAkssXTb09meHmA1m07QrNVoQLj7KC9k7JwWuKPW vnhBKli3WYMhx0JP3NTQLJvTxwVeU8635OvnmD84/geb3QY0hChXUDpBRptZBKKu/XJ7 Jn734GllgUQ3mwsOMHNTiBtpzQRZwswwXYGeVgnmalddAy3fhdLIrVQ9DDrs5L8Ginki gvXQwQYPY2goYtF1+PKT3QFAABYhmJ0DjgSArIDaFxvyj5gjoJ1lF+vII3DsaEA4A3mR U76g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=nay9cUaIbhsAnRZtB5Llkj4wIDOwzifTjZex0bn/Tho=; b=LKeBmui/kX8p/bRJ1FNBzq72lDt+GF+YbZx3XsjXdz2KJUKb+fwnZ2d7+aAvXYt0ic OOR7EcoB3G4LKFJuhfceIjv5prqvLB2ulXAI+7ADgutRyIPwkRwi6Wl1PpXnSx4Z5nWD GlvA+KvHfJTSuyoKex7kyYZlNdOdWYXmCwxz6A88O7fqgiFe8H7nzSbIICkPWkdEj3yU 9e50B6ZmucQdG8mQe8tu55pJeCfpbX1hAZk1ckRa04v170nmShSNdyoTcHvYp/gr4zSk KBhre1QN50n7gZ4EKyCcJsp9dSHCTncdmff56oBxd4V+1S1eR5dgWQC3X4xJGkYvB/dm iBRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=c1V+DDJu; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id u90si511006edc.191.2017.09.21.07.41.22; Thu, 21 Sep 2017 07:41:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=c1V+DDJu; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: by lists.denx.de (Postfix, from userid 105) id 460EFC21DD0; Thu, 21 Sep 2017 14:38:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6422BC21F9D; Thu, 21 Sep 2017 14:34:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 017C7C21E3B; Thu, 21 Sep 2017 14:32:07 +0000 (UTC) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by lists.denx.de (Postfix) with ESMTPS id C54DCC21FF8 for ; Thu, 21 Sep 2017 14:32:03 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LEV1kg032533; Thu, 21 Sep 2017 09:31:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1506004261; bh=F2Y2IsWB24n5MRCcPxfmuaSkg1kruAKFTGrlaUFhN+I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=c1V+DDJuyR/5LbpwyI44zlNTDZEx4yZOeMHgMddd3iOl1K/FkeWLjgnhFKpnOcXif C5zAEu4y8oth97xZmad6IPysWtI4wj90jowtbeunS723h0NexB/tYr7ZiDqGNOvTUJ 3BGn0k8yJmHGOZMkXeP9nfduV7m6BEnSczwUCti8= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEUuwT028920; Thu, 21 Sep 2017 09:30:56 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 21 Sep 2017 09:30:55 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 21 Sep 2017 09:30:56 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEUsVW016509; Thu, 21 Sep 2017 09:30:55 -0500 From: Jean-Jacques Hiblot To: , , , Date: Thu, 21 Sep 2017 16:30:04 +0200 Message-ID: <1506004213-22620-18-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506004213-22620-1-git-send-email-jjhiblot@ti.com> References: <1506004213-22620-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 17/26] mmc: disable the mmc clock during power off X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Kishon Vijay Abraham I There is no point in having the mmc clock enabled during power off. Disable the mmc clock. This is similar to how it's programmed in Linux Kernel. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Vignesh R Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Simon Glass --- drivers/mmc/mmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 1c941a2..1f9730e 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1971,6 +1971,7 @@ static int mmc_power_on(struct mmc *mmc) static int mmc_power_off(struct mmc *mmc) { + mmc_set_clock(mmc, 1, true); #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR) if (mmc->vmmc_supply) { int ret = regulator_set_enable(mmc->vmmc_supply, false);