From patchwork Fri Sep 15 12:44:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112734 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp575268qgf; Fri, 15 Sep 2017 05:47:07 -0700 (PDT) X-Google-Smtp-Source: AOwi7QB4EuEAHPj8sz0Ec/NZrG/hfE+3R4MQusdX6g2MajxPPYlHLK8YSSxU7BJAWt3V7JfXoi8P X-Received: by 10.80.222.8 with SMTP id z8mr4961491edk.214.1505479627271; Fri, 15 Sep 2017 05:47:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505479627; cv=none; d=google.com; s=arc-20160816; b=F5BlNILMCZmOCk8sJ9NsQcgAnYBxRgsrgdc5YADYwhIwblDUE/4+t2ODoxdZWyNBE7 X84Lp+7626rH5jUrSP2tkiEoSGyzdYFJmL1mPu3KUTu4ZTDn1FfkDWCyZL9q/fS4CWGJ zt10P9tzOZVCiGyB9HAqQRSudk/YPAJkgLTVQcTgtIxqrvnIFbRNz+sjPdiU4tygUhz/ zIPUgiewV+WcuD//4vzcOAPzlVwvsnLsIqxx3NTwANX0fH7HE9Ip4KAyEyuuPJMtXuvl YTfMDqnjcGy3ywiU55ltEUJJI9Xylgmtj/TX6RVVj3sdndYqc6dfh04+jarK6jwwVGK0 8aJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=5HJfUbFlppeIZU9V9ebMU/jZccmihqmnYdX2xl8XKuA=; b=kYuLrllUzkfUTX4h/UMynlZg3Hn32HCutO9BX2rjTFOL1v26RNtPBikx7VE6R3kfxu X4Ik+5gpG19p09eQrhCYbK81kQkl4Pxt2chry12JVrmRPGo5Utp1sMGMlzgXdnfkVC9Q SaPMZGd7lwpV8nZfqzha0pzmoL3hYljZskjP8YYI5+oJ1Ad/ZW5U1ci0vw+qmExBGgC4 NtNvoZ2k/69zl4rn6k8y/ma/ErfctKIuT8OF5gcNbHd/V/WeJV9WwgLMLqyfvItYKwIf 8H5D3wkUPqd9H4J/x2uL7ejxJ2Sd6zpQ/+tzQpps8LNN1/W9gag9oQ7f9s8SEddCnAgw tC4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=ZzyCsOyN; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id d90si1202159edd.470.2017.09.15.05.47.06; Fri, 15 Sep 2017 05:47:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=ZzyCsOyN; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id D430CC22015; Fri, 15 Sep 2017 12:46:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 374A9C21F73; Fri, 15 Sep 2017 12:46:07 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 459C4C21E7C; Fri, 15 Sep 2017 12:45:30 +0000 (UTC) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by lists.denx.de (Postfix) with ESMTPS id E9437C21FF5 for ; Fri, 15 Sep 2017 12:45:29 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id v8FCj4JJ012431; Fri, 15 Sep 2017 21:45:05 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com v8FCj4JJ012431 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505479506; bh=jeL/UlVnRVjrpcW10QIc5cR+TdE2SD0Twiv/TYvYlgw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZzyCsOyNUGjNM0JnM4srN3PPFkokcVasJQbmylzAZkLk92yXTTkTw1YKQIe0/qlFd F5gAEjt2jcUuj1kCSHlvypJcraBxC6h/F+LdvXXgjNnwpbvo1GmXcokfQPjRQSfzOI rbmzAJ2vjq/Eb06agQegPtIS9IhCHHlJEbjcuxzOI6UsjtTmHoOkT47N+blZHm+fsw DLdV2yxTMgqhOiGnbn6a0UTmcXOSEa43/juuR+Te6pCytQZqEzipmVSgos5DFTwDAn OkSuh5jHqMOjOP4JO67/nJsC5tmRDjXnBeuvZcmMPhf4MX3IcjKY1plPdZRHIVW21d COcr/MS0HsrLw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 15 Sep 2017 21:44:59 +0900 Message-Id: <1505479499-2862-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505479499-2862-1-git-send-email-yamada.masahiro@socionext.com> References: <1505479499-2862-1-git-send-email-yamada.masahiro@socionext.com> Cc: Scott Wood , Scott Wood Subject: [U-Boot] [PATCH 2/2] mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Set Features (0xEF) command toggles the R/B# pin after 4 sub feature parameters are written. Currently, nand_command(_lp) calls chip->dev_ready immediately after the address cycle because NAND_CMD_SET_FEATURES falls into default: label. No wait is needed at this point. If you see nand_onfi_set_features(), R/B# is already cared by the chip->waitfunc call. [masahiro: import Linux commit c5d664aa5a4c4b257a54eb35045031630d105f49] Signed-off-by: Masahiro Yamada Signed-off-by: Boris Brezillon --- drivers/mtd/nand/nand_base.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 776c20f..a95134c 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -652,6 +652,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_SEQIN: case NAND_CMD_STATUS: case NAND_CMD_READID: + case NAND_CMD_SET_FEATURES: return; case NAND_CMD_RESET: @@ -750,6 +751,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, case NAND_CMD_RNDIN: case NAND_CMD_STATUS: case NAND_CMD_READID: + case NAND_CMD_SET_FEATURES: return; case NAND_CMD_RESET: