From patchwork Fri Apr 14 02:30:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 97421 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp105357qgf; Thu, 13 Apr 2017 19:30:27 -0700 (PDT) X-Received: by 10.28.135.130 with SMTP id j124mr2504823wmd.125.1492137027375; Thu, 13 Apr 2017 19:30:27 -0700 (PDT) Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id 71si1298093wmo.0.2017.04.13.19.30.26; Thu, 13 Apr 2017 19:30:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 7F1E8C21CCE; Fri, 14 Apr 2017 02:30:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 431E9C21C4B; Fri, 14 Apr 2017 02:30:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 35411C21C4B; Fri, 14 Apr 2017 02:30:21 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id 3F394C21C41 for ; Fri, 14 Apr 2017 02:30:19 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v3E2U9tJ029669; Fri, 14 Apr 2017 11:30:09 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v3E2U9tJ029669 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1492137009; bh=e4hWDgeLzEAoYdVdBNMtRyUqYqZvux18iyZpmrO3dVc=; h=From:To:Cc:Subject:Date:From; b=R5CXO7tn1Sdx+RJOMpy97LhQrtjqUzHofRFLB51vnqleXIkNidEIHdXf0IxvY7s5V /BFKIKiZxJL4VntzWeeUP0HwCKNdCvLnz8P7Mnj85ZbAd65Knkmhj7ZWv3ZfZMcxYO vdDpWQW+54PV97uyzRlXFOFsh8zodSHwjcsraxmKnXi+4SlfD1QPbrbzuv4RCtZ8nU KaWw+VCiWFgpVbsEB8wNezvlyv9nX9/9WVwMCbfPxeP3URZMnb/6tTA/9gK2sBwR1B ViQGLCpC4HaxsHoYO54CLEls/FEzEHgXuC5Fs4HKNvY0zjdlpdLWLfDMUjwVf312ER NcR0YeuPTwTcg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 14 Apr 2017 11:30:05 +0900 Message-Id: <1492137005-19491-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Subject: [U-Boot] [PATCH] ARM: uniphier: setup EHCI PHY paramters for LD11 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Set the same PHY parameters as the Boot ROM uses. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/clk/clk-ld11.c | 9 +++++++++ arch/arm/mach-uniphier/sg-regs.h | 1 + 2 files changed, 10 insertions(+) diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index a4dcde7..36aa787 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -37,9 +37,18 @@ void uniphier_ld11_clk_init(void) { /* FIXME: the current clk driver can not handle parents */ u32 tmp; + int ch; + tmp = readl(SC_CLKCTRL4); tmp |= SC_CLKCTRL4_MIO | SC_CLKCTRL4_STDMAC; writel(tmp, SC_CLKCTRL4); + + for (ch = 0; ch < 3; ch++) { + void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL; + + writel(0x82280600, phyctrl + 8 * ch); + writel(0x00000106, phyctrl + 8 * ch + 4); + } } #endif } diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 4d7e6f7..dc94084 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -55,6 +55,7 @@ #define SG_MEMCONF_SPARSEMEM (0x1 << 4) +#define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500) #define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554) #define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)