From patchwork Fri Apr 14 02:10:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 97417 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp100776qgf; Thu, 13 Apr 2017 19:11:06 -0700 (PDT) X-Received: by 10.223.148.199 with SMTP id 65mr5088343wrr.37.1492135866603; Thu, 13 Apr 2017 19:11:06 -0700 (PDT) Return-Path: Received: from lists.denx.de (dione.denx.de. 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Fri, 14 Apr 2017 02:10:59 +0000 (UTC) Received: from conuserg-10.nifty.com (conuserg-10.nifty.com [210.131.2.77]) by lists.denx.de (Postfix) with ESMTPS id 87A33C21C35 for ; Fri, 14 Apr 2017 02:10:58 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id v3E2ARiZ004239; Fri, 14 Apr 2017 11:10:28 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v3E2ARiZ004239 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1492135829; bh=xooQ04ISjBHw01nR55JHnkSFfI9VzlMsrcBBC1rAd9g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qhgdODaHn64f4Zrkgmix1BnvpTdANGg0+WqHqf/6hpCis3W966Z570TsoXMcRoMHa OMaTtedA0Yqog8pwGJsKjzvIxynCnD9hDsb3H6ELBm35pm+JQtTsG0K76GubKMfGFl a060HTCrYIhdIpqjnEhbxDKW7nu5AIU/OR/aA3foFqBiBurFArzQGv23npbHx9PQeG I8Zd2SuTVPGb92diaBe1A3N8lIXqAK2FeI+Iy7WRivqb9d5execWLN7Ky014A1xZMK Zxn6MhsToT+af34PCLtIJTu7wm9c9VY1hR1KBnqDRdkO20xDgQmov0NllXsLdG35YY DayQA2lGP6CaA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 14 Apr 2017 11:10:23 +0900 Message-Id: <1492135824-15674-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492135824-15674-1-git-send-email-yamada.masahiro@socionext.com> References: <1492135824-15674-1-git-send-email-yamada.masahiro@socionext.com> Cc: Tom Rini Subject: [U-Boot] [PATCH v3 2/3] ARM: adjust arm-smccc code for use in U-Boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adjust ARM SMC Calling Convention code for U-Boot: - Replace the license block with SPDX - Change path to asm-offsets.h - Define UNWIND() as no-op - Add Kconfig entry - Add asm-offsets Signed-off-by: Masahiro Yamada --- Changes in v3: - opcodes-virt.h is GPL-2.0+ Changes in v2: - split into separate patches "import" and "adjust" arch/arm/Kconfig | 8 ++++++++ arch/arm/cpu/armv7/Makefile | 1 + arch/arm/cpu/armv7/smccc-call.S | 12 ++---------- arch/arm/cpu/armv8/Makefile | 2 ++ arch/arm/cpu/armv8/smccc-call.S | 12 ++---------- arch/arm/include/asm/opcodes-sec.h | 11 ++--------- arch/arm/include/asm/opcodes-virt.h | 14 +------------- arch/arm/include/asm/opcodes.h | 4 +--- arch/arm/lib/asm-offsets.c | 8 ++++++++ include/linux/arm-smccc.h | 10 +--------- 10 files changed, 28 insertions(+), 54 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7b20750..84744ef 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -174,6 +174,14 @@ config SYS_CACHELINE_SIZE default 64 if SYS_CACHE_SHIFT_6 default 32 if SYS_CACHE_SHIFT_5 +config ARM_SMCCC + bool "Support for ARM SMC Calling Convention (SMCCC)" + depends on CPU_V7 || ARM64 + help + Say Y here if you want to enable ARM SMC Calling Convention. + This should be enabled if U-Boot needs to communicate with system + firmware (for example, PSCI) according to SMCCC. + config SEMIHOSTING bool "support boot from semihosting" help diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 02e8778..3a9913a 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -18,6 +18,7 @@ obj-y += lowlevel_init.o endif endif +obj-$(CONFIG_ARM_SMCCC) += smccc-call.o obj-$(CONFIG_ARMV7_NONSEC) += nonsec_virt.o virt-v7.o virt-dt.o obj-$(CONFIG_ARMV7_PSCI) += psci.o psci-common.o diff --git a/arch/arm/cpu/armv7/smccc-call.S b/arch/arm/cpu/armv7/smccc-call.S index e5d4306..c2fdbad 100644 --- a/arch/arm/cpu/armv7/smccc-call.S +++ b/arch/arm/cpu/armv7/smccc-call.S @@ -1,22 +1,14 @@ /* * Copyright (c) 2015, Linaro Limited * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * + * SPDX-License-Identifier: GPL-2.0 */ #include #include #include -#include +#define UNWIND(x...) /* * Wrap c macros in asm macros to delay expansion until after the * SMCCC asm macro is expanded. diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 65915ee..c447085 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -16,6 +16,8 @@ obj-y += tlb.o obj-y += transition.o obj-y += fwcall.o obj-y += cpu-dt.o +obj-$(CONFIG_ARM_SMCCC) += smccc-call.o + ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o endif diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index 6252234..bbb6cba 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -1,19 +1,11 @@ /* * Copyright (c) 2015, Linaro Limited * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License Version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * + * SPDX-License-Identifier: GPL-2.0 */ #include #include -#include +#include .macro SMCCC instr .cfi_startproc diff --git a/arch/arm/include/asm/opcodes-sec.h b/arch/arm/include/asm/opcodes-sec.h index bc3a917..16dee8f 100644 --- a/arch/arm/include/asm/opcodes-sec.h +++ b/arch/arm/include/asm/opcodes-sec.h @@ -1,14 +1,7 @@ /* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * * Copyright (C) 2012 ARM Limited + * + * SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARM_OPCODES_SEC_H diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h index efcfdf9..9272997 100644 --- a/arch/arm/include/asm/opcodes-virt.h +++ b/arch/arm/include/asm/opcodes-virt.h @@ -2,19 +2,7 @@ * opcodes-virt.h: Opcode definitions for the ARM virtualization extensions * Copyright (C) 2012 Linaro Limited * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __ASM_ARM_OPCODES_VIRT_H #define __ASM_ARM_OPCODES_VIRT_H diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h index e796c59..199f0ba 100644 --- a/arch/arm/include/asm/opcodes.h +++ b/arch/arm/include/asm/opcodes.h @@ -1,9 +1,7 @@ /* * arch/arm/include/asm/opcodes.h * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_ARM_OPCODES_H diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index e5bcaea..d620dc0 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -14,6 +14,7 @@ #include #include +#include #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) \ || defined(CONFIG_MX51) || defined(CONFIG_MX53) @@ -198,5 +199,12 @@ int main(void) DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn)); #endif +#ifdef CONFIG_ARM_SMCCC + DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); + DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); + DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); + DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); +#endif + return 0; } diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 4c5bca3..28e61ce 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -1,15 +1,7 @@ /* * Copyright (c) 2015, Linaro Limited * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * + * SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H