From patchwork Wed Mar 8 02:35:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 95017 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp2161216qgd; Tue, 7 Mar 2017 18:36:45 -0800 (PST) X-Received: by 10.28.7.20 with SMTP id 20mr3165582wmh.115.1488940605212; Tue, 07 Mar 2017 18:36:45 -0800 (PST) Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id i124si21245208wma.144.2017.03.07.18.36.44; Tue, 07 Mar 2017 18:36:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 9B90FC21CCC; Wed, 8 Mar 2017 02:36:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9AD93C21C56; Wed, 8 Mar 2017 02:36:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E3F3FC21C56; Wed, 8 Mar 2017 02:36:34 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id D5DEEC21C33 for ; Wed, 8 Mar 2017 02:36:33 +0000 (UTC) Received: from pug.jp.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v282ZF63005952; Wed, 8 Mar 2017 11:35:15 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v282ZF63005952 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1488940515; bh=hGwTyeYf4KlyZtXcLrWvhJqR74ndkFiaXBaeCZOWxOM=; h=From:To:Cc:Subject:Date:From; b=WN4zdSVWCsk8CC+f9mDPD3KbTOcdvGqxTo23jpYAMSyiNop8kfMHxF9dDsN0Jestb PbCamXlOAXG3F2ON7OfTTHPbl41WVFkosjo+ePuZk3McMPmN27m0BCS+o2t4o11Wxr bQC2NpyVwtCvQfWnmf9dHMLBYGjOgSE71pH4IW+R7gC/+h2kYXbNg9YLXi49NxhqGi CxaJ4Y0OfN+Ouvyk0ArkF4dubqMMIn5oXOfiKJZsCWvoSK5FmwVjX/WvtMsPTEs1jd pBPxb2sv+uyfo2IpXL+DZApgLERYskh03EAbzvTyiNcS5ZLOcZ7jo8me80Z34fZL1X nWHRmnVoi2k0A== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Wed, 8 Mar 2017 11:35:12 +0900 Message-Id: <1488940512-18181-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Cc: Tom Rini , Scott Wood Subject: [U-Boot] [PATCH v2] arm64: booti: allow to place kernel image anywhere in physical memory X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" At first, the ARM64 Linux booting requirement recommended that the kernel image be placed text_offset bytes from 2MB aligned base near the start of usable system RAM because memory below that base address was unusable at that time. This requirement was relaxed by Linux commit a7f8de168ace ("arm64: allow kernel Image to be loaded anywhere in physical memory"). Since then, the bit 3 of the flags field indicates the tolerance of the kernel physical placement. If this bit is set, the 2MB aligned base may be anywhere in physical memory. For details, see Documentation/arm64/booting.txt of Linux. The booti command should be also relaxed. If the bit 3 is set, images->ep is respected, and the image is placed at the nearest bootable location. Otherwise, it is relocated to the start of the system RAM to keep the original behavior. Signed-off-by: Masahiro Yamada --- Changes in v2: - Use le64_to_cpu() for correct endian-ness - Check the bit 3 cmd/booti.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/cmd/booti.c b/cmd/booti.c index bff87a8..8f3507d 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -20,7 +22,7 @@ struct Image_header { uint32_t code1; /* Executable code */ uint64_t text_offset; /* Image load offset, LE */ uint64_t image_size; /* Effective Image size, LE */ - uint64_t res1; /* reserved */ + uint64_t flags; /* Kernel flags, LE */ uint64_t res2; /* reserved */ uint64_t res3; /* reserved */ uint64_t res4; /* reserved */ @@ -51,10 +53,18 @@ static int booti_setup(bootm_headers_t *images) } /* - * If we are not at the correct run-time location, set the new - * correct location and then move the image there. + * If bit 3 of the flags field is set, the 2MB aligned base of the + * kernel image can be anywhere in physical memory, so respect + * images->ep. Otherwise, relocate the image to the base of RAM + * since memory below it is not accessible via the linear mapping. */ - dst = gd->bd->bi_dram[0].start + le64_to_cpu(ih->text_offset); + if (le64_to_cpu(ih->flags) & BIT(3)) + dst = images->ep - le64_to_cpu(ih->text_offset); + else + dst = gd->bd->bi_dram[0].start; + + dst = ALIGN(dst, SZ_2M); + dst += le64_to_cpu(ih->text_offset); unmap_sysmem(ih);