From patchwork Fri Feb 17 07:17:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 94114 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp43326qgi; Thu, 16 Feb 2017 23:17:45 -0800 (PST) X-Received: by 10.28.35.65 with SMTP id j62mr818891wmj.31.1487315865782; Thu, 16 Feb 2017 23:17:45 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id f47si5832354wrf.268.2017.02.16.23.17.45; Thu, 16 Feb 2017 23:17:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7EEEE4AAD2; Fri, 17 Feb 2017 08:17:44 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mlu0iP_L0pXt; Fri, 17 Feb 2017 08:17:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CD6FF4A08A; Fri, 17 Feb 2017 08:17:43 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CC8704A08A for ; Fri, 17 Feb 2017 08:17:38 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7kxQNLvFRE94 for ; Fri, 17 Feb 2017 08:17:38 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 224AE4A068 for ; Fri, 17 Feb 2017 08:17:34 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v1H7HOK8016661; Fri, 17 Feb 2017 16:17:27 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v1H7HOK8016661 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1487315847; bh=AfZWyc3N23TYhwpLweRDZ09b8BnpQztTjbG8DJIOpl0=; h=From:To:Cc:Subject:Date:From; b=qUT/IlaOGsgL3paHbnDQsU15WTubegxminWW+WRSOu6qnKpSr9mT0NioNjO5aVpT0 gbMK0NZ9s5LbfdfrjEy9a6Ox0+dYXEO4gJsmdxCHx2Jah2/XQsX6NYOo21bFze0CG1 JtSHZa7xTNjfoomMnSDSPTe34LKrqZ+4jpFCJWamX7cCQM1Je+p7rpbJi/oKEvINTc fWixJ63yjYAIxBSfLcgji40hn/C3v3luUUqGiO/78YgS1aqmO3nSOgutXuRZd3IlVK wYJ3lcDpauKgcs7smGvjp9KvoOkgPxR9jGcmMCmCtg7m0XgMQvQ95Zt/vGQt/GNv/l r5eMgGPhnIq9Q== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 17 Feb 2017 16:17:22 +0900 Message-Id: <1487315842-14549-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Cc: Albert Aribaud Subject: [U-Boot] [PATCH] ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device would stay in the reset state until its RST_n pin is deasserted by software. Currently, this is cared by an ad-hoc way because the eMMC hardware reset provider is not supported in U-Boot for now. This code should be re-written once the "mmc-pwrseq-emmc" binding is supported. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 1 + arch/arm/mach-uniphier/clk/Makefile | 2 +- arch/arm/mach-uniphier/clk/clk-ld11.c | 5 +++++ arch/arm/mach-uniphier/clk/clk-ld20.c | 17 +++++++++++++++++ arch/arm/mach-uniphier/init.h | 1 + 5 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-uniphier/clk/clk-ld20.c -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index e89a4c5..2564a02 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -165,6 +165,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { .nand_2cs = false, .sbc_init = uniphier_ld11_sbc_init, .pll_init = uniphier_ld20_pll_init, + .clk_init = uniphier_ld20_clk_init, .misc_init = uniphier_ld20_misc_init, }, #endif diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 43df670..4134197 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-ld20.o obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += pll-pxs3.o endif diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index b1e82a1..a4dcde7 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -13,6 +13,8 @@ #include "../sc64-regs.h" #include "../sg-regs.h" +#define SDCTRL_EMMC_HW_RESET 0x59810280 + void uniphier_ld11_clk_init(void) { /* if booted from a device other than USB, without stand-by MPU */ @@ -28,6 +30,9 @@ void uniphier_ld11_clk_init(void) writel(7, SG_ETPHYCNT); } + /* TODO: use "mmc-pwrseq-emmc" */ + writel(1, SDCTRL_EMMC_HW_RESET); + #ifdef CONFIG_USB_EHCI { /* FIXME: the current clk driver can not handle parents */ diff --git a/arch/arm/mach-uniphier/clk/clk-ld20.c b/arch/arm/mach-uniphier/clk/clk-ld20.c new file mode 100644 index 0000000..5bb560c --- /dev/null +++ b/arch/arm/mach-uniphier/clk/clk-ld20.c @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +#include "../init.h" + +#define SDCTRL_EMMC_HW_RESET 0x59810280 + +void uniphier_ld20_clk_init(void) +{ + /* TODO: use "mmc-pwrseq-emmc" */ + writel(1, SDCTRL_EMMC_HW_RESET); +} diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index be0ad6c..5c45f2d 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -118,6 +118,7 @@ void uniphier_pro4_clk_init(void); void uniphier_pro5_clk_init(void); void uniphier_pxs2_clk_init(void); void uniphier_ld11_clk_init(void); +void uniphier_ld20_clk_init(void); unsigned int uniphier_boot_device_raw(void); int uniphier_pin_init(const char *pinconfig_name);