From patchwork Mon Feb 13 16:24:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 93904 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1168656qgi; Mon, 13 Feb 2017 08:25:11 -0800 (PST) X-Received: by 10.223.171.12 with SMTP id q12mr19899619wrc.74.1487003111833; Mon, 13 Feb 2017 08:25:11 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id p64si14421494wrc.262.2017.02.13.08.25.11; Mon, 13 Feb 2017 08:25:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2F8104ACF9; Mon, 13 Feb 2017 17:25:07 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z8nmyUK6ZAsS; Mon, 13 Feb 2017 17:25:07 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 496F44AD1F; Mon, 13 Feb 2017 17:25:03 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D623C4A997 for ; Mon, 13 Feb 2017 17:24:52 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9ZiCnebs3UA5 for ; Mon, 13 Feb 2017 17:24:52 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-10.nifty.com (conuserg-10.nifty.com [210.131.2.77]) by theia.denx.de (Postfix) with ESMTPS id 17D694A05F for ; Mon, 13 Feb 2017 17:24:47 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-10.nifty.com with ESMTP id v1DGORTa006492; Tue, 14 Feb 2017 01:24:31 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v1DGORTa006492 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1487003071; bh=acyM0lkeDC/kP2ZrvsGev7EKF+eP+wng6thWacZtrOs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mKBEb1+ak1MgJ1jZlmAR7oG64XNMjtquWXXIB08bkYEaGD1GfYv79guM1xOZGFkqt xVA9fMSQw46boLBaW056YSUfqvVmHhl/XGEDxZfc/Rk+Ilq6P5ICFYYxX3CBlqfFpr GuHYiXJVXJpKDZMFjvFaBBQNwpbAWOFUkdH8BUYQl+eAW+eqmHX4Z/o/5YtDMjnuRB u+WZ37Ul7fFlEFj6DArorlo050Rmapy8SgC2zrwHKRymG8Z1+iL3Csi1pRe5v3sM1k wX5/m9ksjiGM4EkMIjqzs+AAspqG35Kwug4A2yQ73yVqf4PLXpy66Awik+QUsiNQS+ a+dUCu1ss78Fw== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 14 Feb 2017 01:24:25 +0900 Message-Id: <1487003066-14387-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487003066-14387-1-git-send-email-yamada.masahiro@socionext.com> References: <1487003066-14387-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 2/3] ARM: uniphier: move spl_boot_mode() to a separate file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The spl_boot_mode() is unrelated to the other code in this file. Besides, this function is only called from common/spl/spl_mmc.c, so it is reasonable to guard with CONFIG_SPL_MMC_SUPPORT. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 1 + arch/arm/mach-uniphier/boot-mode/boot-mode.c | 24 ------------------------ arch/arm/mach-uniphier/mmc-boot-mode.c | 27 +++++++++++++++++++++++++++ 3 files changed, 28 insertions(+), 24 deletions(-) create mode 100644 arch/arm/mach-uniphier/mmc-boot-mode.c -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 0eb59fb..7baec73 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -8,6 +8,7 @@ obj-y += boards.o obj-y += spl_board_init.o obj-y += memconf.o obj-y += bcu/ +obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc-boot-mode.o else diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index 6ce3273..4e1142b 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -76,27 +76,3 @@ u32 spl_boot_device(void) return mode; } - -u32 spl_boot_mode(const u32 boot_device) -{ - struct mmc *mmc; - - /* - * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8: - * - * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of - * Extended CSD register; when switching to the Boot Partition 1, the - * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for - * the Access Bits, but in fact it uses Write Byte for the Access Bits. - * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG - * is lost. This bug was fixed for PH1-Pro5 and later SoCs. - * - * Fixup mmc->part_config here because it is used to determine the - * partition which the U-Boot image is read from. - */ - mmc = find_mmc_device(0); - mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK); - mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE; - - return MMCSD_MODE_EMMCBOOT; -} diff --git a/arch/arm/mach-uniphier/mmc-boot-mode.c b/arch/arm/mach-uniphier/mmc-boot-mode.c new file mode 100644 index 0000000..ca13bac --- /dev/null +++ b/arch/arm/mach-uniphier/mmc-boot-mode.c @@ -0,0 +1,27 @@ +#include +#include +#include + +u32 spl_boot_mode(const u32 boot_device) +{ + struct mmc *mmc; + + /* + * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8: + * + * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of + * Extended CSD register; when switching to the Boot Partition 1, the + * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for + * the Access Bits, but in fact it uses Write Byte for the Access Bits. + * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG + * is lost. This bug was fixed for PH1-Pro5 and later SoCs. + * + * Fixup mmc->part_config here because it is used to determine the + * partition which the U-Boot image is read from. + */ + mmc = find_mmc_device(0); + mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK); + mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE; + + return MMCSD_MODE_EMMCBOOT; +}