From patchwork Fri Jan 27 21:53:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92725 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp445101qgi; Fri, 27 Jan 2017 13:55:14 -0800 (PST) X-Received: by 10.223.168.87 with SMTP id l81mr11179383wrc.194.1485554114914; Fri, 27 Jan 2017 13:55:14 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id w130si4262766wmf.21.2017.01.27.13.55.14; Fri, 27 Jan 2017 13:55:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ADE68B3882; Fri, 27 Jan 2017 22:54:56 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HM44tio7elLq; Fri, 27 Jan 2017 22:54:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1C6E1B387E; Fri, 27 Jan 2017 22:54:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 549C1A75F6 for ; Fri, 27 Jan 2017 22:54:35 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6w5ZgK4jQHPn for ; Fri, 27 Jan 2017 22:54:35 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id B5987A75F3 for ; Fri, 27 Jan 2017 22:54:26 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0RLs2XB015159; Sat, 28 Jan 2017 06:54:12 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0RLs2XB015159 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1485554052; bh=4acdqJoJ6/mNre08bL1qlhn4r1NyTkrFwaCrxmAgnvQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ijs0keq07l99OGZwTsM9wuI2KbnKuTEwThz/J25rndjlrp5tW4eMxKp1l2lqrgcFW zVGo0k7S93dhn/Y3lTGB8H8pTTB8tEPNXwSuTbDYFSl7oyUosKMh7fLCnY62fWZV7R wXT7rfHz+m9LPjzUoFYDwtsbFCgf5RhuLdEwUszJ4CLakEumRQsvz5mN7T83E1vPij 6fFQ3tiEG0vxugBId6uV7OyeRSIZLdXcUlsYTk9x+2cbpeYzTmot+b4tc2uUAn+U2l TA4GvnCNkRgXndkb4mYX4sgNo0Qk1OGEEqp65P8ldRacja1FQ81v/IGPcUxbW9m1Sq l6M3C9dIJVZrw== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 28 Jan 2017 06:53:53 +0900 Message-Id: <1485554036-29320-14-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485554036-29320-1-git-send-email-yamada.masahiro@socionext.com> References: <1485554036-29320-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 13/16] ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Boot ROM supports authentication feature to prevent malformed software from being run on products. The signature is added at the tail of the second stage loader (= SPL in U-boot terminology). The size of the second stage loader was 64KB, and it was consistent across SoCs. The situation changed when LD20 SoC appeared; it loads 80KB second stage loader, and it is the only exception. Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is loaded from the 64KB offset of non-volatile devices. This means the signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot proper image. Let's move the U-Boot proper image to 128KB offset. It uses 48KB for nothing but padding, and we could actually locate the U-Boot proper at 80KB offset. However, the power of 2 generally seems a better choice for the offset address. Signed-off-by: Masahiro Yamada --- common/spl/Kconfig | 3 +-- include/configs/uniphier.h | 20 +++++++++++++------- 2 files changed, 14 insertions(+), 9 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/common/spl/Kconfig b/common/spl/Kconfig index b1aa148..b2ba492 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -86,9 +86,8 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR depends on SPL && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR default 0x50 if ARCH_SUNXI default 0x75 if ARCH_DAVINCI - default 0x80 if ARCH_UNIPHIER default 0x8a if ARCH_MX6 - default 0x100 if ARCH_ROCKCHIP + default 0x100 if ARCH_ROCKCHIP || ARCH_UNIPHIER default 0x140 if ARCH_MVEBU default 0x200 if ARCH_SOCFPGA || ARCH_AT91 default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index a53d2e3..a8a1849 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -231,19 +231,19 @@ "nor_base=0x42000000\0" \ "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ "tftpboot $tmp_addr u-boot-spl.bin &&" \ - "setexpr tmp_addr $nor_base + 0x60000 &&" \ + "setexpr tmp_addr $nor_base + 0x70000 && " \ "tftpboot $tmp_addr u-boot.bin\0" \ "emmcupdate=mmcsetn &&" \ "mmc partconf $mmc_first_dev 0 1 1 &&" \ "tftpboot u-boot-spl.bin &&" \ - "mmc write $loadaddr 0 80 &&" \ + "mmc write $loadaddr 0 100 && " \ "tftpboot u-boot.bin &&" \ - "mmc write $loadaddr 80 780\0" \ + "mmc write $loadaddr 100 700\0" \ "nandupdate=nand erase 0 0x00100000 &&" \ "tftpboot u-boot-spl.bin &&" \ - "nand write $loadaddr 0 0x00010000 &&" \ + "nand write $loadaddr 0 0x00020000 && " \ "tftpboot u-boot.bin &&" \ - "nand write $loadaddr 0x00010000 0x000f0000\0" \ + "nand write $loadaddr 0x00020000 0x000e0000\0" \ LINUXBOOT_ENV_SETTINGS #define CONFIG_SYS_BOOTMAPSZ 0x20000000 @@ -283,14 +283,18 @@ #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 /* subtract sizeof(struct image_header) */ -#define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) +#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 +#if defined(CONFIG_ARCH_UNIPHIER_LD20) +#define CONFIG_SPL_MAX_SIZE 0x14000 +#else #define CONFIG_SPL_MAX_SIZE 0x10000 +#endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) #define CONFIG_SPL_BSS_START_ADDR 0x30012000 #elif defined(CONFIG_ARCH_UNIPHIER_LD20) @@ -298,4 +302,6 @@ #endif #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 +#define CONFIG_SPL_PAD_TO 0x20000 + #endif /* __CONFIG_UNIPHIER_COMMON_H__ */