From patchwork Fri Sep 16 18:32:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 76417 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp632797qgf; Fri, 16 Sep 2016 11:33:52 -0700 (PDT) X-Received: by 10.28.66.6 with SMTP id p6mr8707149wma.59.1474050832437; Fri, 16 Sep 2016 11:33:52 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id p207si10193793wme.129.2016.09.16.11.33.51; Fri, 16 Sep 2016 11:33:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C6F0AA7560; Fri, 16 Sep 2016 20:33:44 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Wo8ujnEbtAfN; Fri, 16 Sep 2016 20:33:44 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9125FA7533; Fri, 16 Sep 2016 20:33:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1EC404BA35 for ; Fri, 16 Sep 2016 20:33:32 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DKSe_Me7fS1t for ; Fri, 16 Sep 2016 20:33:31 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-07.nifty.com (conuserg-07.nifty.com [210.131.2.74]) by theia.denx.de (Postfix) with ESMTPS id 4064F4B951 for ; Fri, 16 Sep 2016 20:33:28 +0200 (CEST) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-07.nifty.com with ESMTP id u8GIXENI003360; Sat, 17 Sep 2016 03:33:18 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com u8GIXENI003360 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1474050799; bh=SjcIoN3EZnzyfrcGbPcwJYCw8O1A1zHHJm/T8l+knF0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zzKhx8AkhkCa5aDhDYAMzjhRSeHJ1GEd+d27XsncKkZ05qxE36LCZ2F2UTOOKQNvA fKJIfRBd3Cgk3iDlVkQlGhbRVYM78gpNMIKz1vFEv2kEysI0h9OGl30gKBkLEk7AlN PAXMQCU1cIRgjEFf0P/emmmPz4oQpZ0UXm80w16CN/szYqAnNvuJnvOafgaycNZQ1P Ko4835AGj+9A9j10XitTu6GLnjQkpJ+9VxJz3IsllV6/bt3bTmFlcT5O3xHXnKeJ3j wLvw8Jh3FSJcrWtsT11Lc1nYH01yCMJmiN7rUGNHBNmNKmclzrBKKyj/sZmboOp9G2 xfWeY2ZnttRyQ== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 17 Sep 2016 03:32:59 +0900 Message-Id: <1474050792-23218-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1474050792-23218-1-git-send-email-yamada.masahiro@socionext.com> References: <1474050792-23218-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 02/15] pinctrl: uniphier: add UniPhier sLD3 pinctrl driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add pin-mux support for UniPhier sLD3 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c | 128 +++++++++++++++++++++++ 3 files changed, 135 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 7febea2..689e576 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -3,6 +3,12 @@ if ARCH_UNIPHIER config PINCTRL_UNIPHIER bool +config PINCTRL_UNIPHIER_SLD3 + bool "UniPhier PH1-sLD3 SoC pinctrl driver" + depends on ARCH_UNIPHIER_SLD3 + default y + select PINCTRL_UNIPHIER + config PINCTRL_UNIPHIER_LD4 bool "UniPhier PH1-LD4 SoC pinctrl driver" depends on ARCH_UNIPHIER_LD4 diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 4de251b..fd003ad 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -4,6 +4,7 @@ obj-y += pinctrl-uniphier-core.o +obj-$(CONFIG_PINCTRL_UNIPHIER_SLD3) += pinctrl-uniphier-sld3.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD4) += pinctrl-uniphier-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PRO4) += pinctrl-uniphier-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c new file mode 100644 index 0000000..d3a507e --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const unsigned emmc_pins[] = {55, 56, 60}; +static const int emmc_muxvals[] = {1, 1, 1}; +static const unsigned emmc_dat8_pins[] = {57}; +static const int emmc_dat8_muxvals[] = {1}; +static const unsigned ether_mii_pins[] = {35, 107, 108, 109, 110, 111, 112, + 113}; +static const int ether_mii_muxvals[] = {1, 2, 2, 2, 2, 2, 2, 2}; +static const unsigned ether_rmii_pins[] = {35}; +static const int ether_rmii_muxvals[] = {1}; +static const unsigned i2c0_pins[] = {36}; +static const int i2c0_muxvals[] = {0}; +static const unsigned nand_pins[] = {38, 39, 40, 58, 59}; +static const int nand_muxvals[] = {1, 1, 1, 1, 1}; +static const unsigned nand_cs1_pins[] = {41}; +static const int nand_cs1_muxvals[] = {1}; +static const unsigned sd_pins[] = {42, 43, 44, 45}; +static const int sd_muxvals[] = {1, 1, 1, 1}; +static const unsigned system_bus_pins[] = {46, 50, 51, 53, 54, 73, 74, 75, 76, + 77, 78, 79, 80, 88, 89, 91, 92, 99}; +static const int system_bus_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1}; +static const unsigned system_bus_cs0_pins[] = {93}; +static const int system_bus_cs0_muxvals[] = {1}; +static const unsigned system_bus_cs1_pins[] = {94}; +static const int system_bus_cs1_muxvals[] = {1}; +static const unsigned system_bus_cs2_pins[] = {95}; +static const int system_bus_cs2_muxvals[] = {1}; +static const unsigned system_bus_cs3_pins[] = {96}; +static const int system_bus_cs3_muxvals[] = {1}; +static const unsigned system_bus_cs4_pins[] = {81}; +static const int system_bus_cs4_muxvals[] = {1}; +static const unsigned system_bus_cs5_pins[] = {82}; +static const int system_bus_cs5_muxvals[] = {1}; +static const unsigned uart0_pins[] = {63, 64}; +static const int uart0_muxvals[] = {0, 1}; +static const unsigned uart1_pins[] = {65, 66}; +static const int uart1_muxvals[] = {0, 1}; +static const unsigned uart2_pins[] = {96, 102}; +static const int uart2_muxvals[] = {2, 2}; +static const unsigned usb0_pins[] = {13, 14}; +static const int usb0_muxvals[] = {0, 1}; +static const unsigned usb1_pins[] = {15, 16}; +static const int usb1_muxvals[] = {0, 1}; +static const unsigned usb2_pins[] = {17, 18}; +static const int usb2_muxvals[] = {0, 1}; +static const unsigned usb3_pins[] = {19, 20}; +static const int usb3_muxvals[] = {0, 1}; + +static const struct uniphier_pinctrl_group uniphier_sld3_groups[] = { + UNIPHIER_PINCTRL_GROUP_SPL(emmc), + UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_mii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(system_bus), + UNIPHIER_PINCTRL_GROUP(system_bus_cs0), + UNIPHIER_PINCTRL_GROUP(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP(system_bus_cs2), + UNIPHIER_PINCTRL_GROUP(system_bus_cs3), + UNIPHIER_PINCTRL_GROUP(system_bus_cs4), + UNIPHIER_PINCTRL_GROUP(system_bus_cs5), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3) +}; + +static const char * const uniphier_sld3_functions[] = { + UNIPHIER_PINMUX_FUNCTION_SPL(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_mii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION(system_bus), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), +}; + +static struct uniphier_pinctrl_socdata uniphier_sld3_pinctrl_socdata = { + .groups = uniphier_sld3_groups, + .groups_count = ARRAY_SIZE(uniphier_sld3_groups), + .functions = uniphier_sld3_functions, + .functions_count = ARRAY_SIZE(uniphier_sld3_functions), + .caps = UNIPHIER_PINCTRL_CAPS_MUX_4BIT, +}; + +static int uniphier_sld3_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &uniphier_sld3_pinctrl_socdata); +} + +static const struct udevice_id uniphier_sld3_pinctrl_match[] = { + { .compatible = "socionext,uniphier-sld3-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(uniphier_sld3_pinctrl) = { + .name = "uniphier-sld3-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(uniphier_sld3_pinctrl_match), + .probe = uniphier_sld3_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};