From patchwork Tue Sep 13 16:06:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 76086 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp1435795qgf; Tue, 13 Sep 2016 09:08:51 -0700 (PDT) X-Received: by 10.194.59.116 with SMTP id y20mr11106971wjq.181.1473782931620; Tue, 13 Sep 2016 09:08:51 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 6si6496538wma.70.2016.09.13.09.08.51; Tue, 13 Sep 2016 09:08:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 633CB4BA16; Tue, 13 Sep 2016 18:07:54 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oS65aYQqMdiR; Tue, 13 Sep 2016 18:07:54 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3E73BA75D7; Tue, 13 Sep 2016 18:07:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CA95E4BA16 for ; Tue, 13 Sep 2016 18:06:36 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7G7obNDf2IIn for ; Tue, 13 Sep 2016 18:06:36 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by theia.denx.de (Postfix) with ESMTPS id 633DA4BA29 for ; Tue, 13 Sep 2016 18:06:35 +0200 (CEST) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-08.nifty.com with ESMTP id u8DG6H9O022555; Wed, 14 Sep 2016 01:06:26 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com u8DG6H9O022555 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1473782786; bh=08ZkGWhiiZ1vQQg4xBATi/kOyNOvEiQQUgGYWXGAis0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zmdkoGeZ1AoeBKgYmdT1G6kXpYQe7XKDfunr0FnkUysaAaiO/t+HRx9v8JDtL/4qq C7w21tNz1jBTT9NfsekXLsY7oUS7aS5nEpEMjw8rwe7wWx82pAW/BlUHmZE+MvANJa J9O/cYG6i3W2gVC1ZVw0yYmGHZrkD3otvjSeuxTqRRsJvTSLGkT8lv+KmWnsfHo59M 4ArKeldKQe+cIX2ddP7ihTVIjQbJPH3207xMiHX37NEz47MECGYwOswAne9JP3CeTx aS9Z6TuHtJ3JuMqi2+z6uv80TDT0v5aZPLPbrevuoWH64MB9xq/eT8n/mCNU6h0l9h Q32gV4Z5unE1Q== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Wed, 14 Sep 2016 01:06:10 +0900 Message-Id: <1473782770-20130-13-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1473782770-20130-1-git-send-email-yamada.masahiro@socionext.com> References: <1473782770-20130-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 12/12] ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Unfortunately, this SoC needs per-board adjustment between clock and address/command lines. This flag will be passed to the DRAM init function and used for compensating the difference of DRAM timing parameters. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/boards.c | 25 ++++++++++++++++++++++++- arch/arm/mach-uniphier/init.h | 11 ++++++++--- 2 files changed, 32 insertions(+), 4 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index f54f464..1dececb 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -184,6 +184,27 @@ static const struct uniphier_board_data uniphier_ld11_data = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) +static const struct uniphier_board_data uniphier_ld20_ref_data = { + .dram_freq = 1866, + .dram_nr_ch = 3, + .dram_ch[0] = { + .base = 0x80000000, + .size = 0x40000000, + .width = 32, + }, + .dram_ch[1] = { + .base = 0xc0000000, + .size = 0x40000000, + .width = 32, + }, + .dram_ch[2] = { + .base = 0x100000000UL, + .size = 0x40000000, + .width = 32, + }, + .flags = UNIPHIER_BD_BOARD_LD20_REF, +}; + static const struct uniphier_board_data uniphier_ld20_data = { .dram_freq = 1866, .dram_nr_ch = 3, @@ -202,6 +223,7 @@ static const struct uniphier_board_data uniphier_ld20_data = { .size = 0x40000000, .width = 32, }, + .flags = UNIPHIER_BD_BOARD_LD20_GLOBAL, }; static const struct uniphier_board_data uniphier_ld21_data = { @@ -217,7 +239,7 @@ static const struct uniphier_board_data uniphier_ld21_data = { .size = 0x20000000, .width = 32, }, - .flags = UNIPHIER_BD_PACKAGE_LD21, + .flags = UNIPHIER_BD_BOARD_LD21_GLOBAL, }; #endif @@ -255,6 +277,7 @@ static const struct uniphier_board_id uniphier_boards[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) { "socionext,ph1-ld21", &uniphier_ld21_data, }, + { "socionext,ph1-ld20-ref", &uniphier_ld20_ref_data, }, { "socionext,ph1-ld20", &uniphier_ld20_data, }, #endif }; diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index a2fedbc..406d5d0 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -23,9 +23,14 @@ struct uniphier_board_data { unsigned int dram_nr_ch; struct uniphier_dram_ch dram_ch[UNIPHIER_MAX_NR_DRAM_CH]; unsigned int flags; -#define UNIPHIER_BD_DDR3PLUS BIT(2) -#define UNIPHIER_BD_PACKAGE_LD21 1 -#define UNIPHIER_BD_PACKAGE_TYPE(f) ((f) & 0x3) + +#define UNIPHIER_BD_DDR3PLUS BIT(2) + +#define UNIPHIER_BD_BOARD_GET_TYPE(f) ((f) & 0x3) +#define UNIPHIER_BD_BOARD_LD20_REF 0 /* LD20 reference */ +#define UNIPHIER_BD_BOARD_LD20_GLOBAL 1 /* LD20 TV Set */ +#define UNIPHIER_BD_BOARD_LD21_REF 2 /* LD21 reference */ +#define UNIPHIER_BD_BOARD_LD21_GLOBAL 3 /* LD21 TV Set */ }; const struct uniphier_board_data *uniphier_get_board_param(void);