From patchwork Fri Sep 2 05:40:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Allred, Daniel" X-Patchwork-Id: 75286 Delivered-To: patch@linaro.org Received: by 10.140.29.8 with SMTP id a8csp672121qga; Thu, 1 Sep 2016 22:41:35 -0700 (PDT) X-Received: by 10.194.88.41 with SMTP id bd9mr18957034wjb.75.1472794895790; Thu, 01 Sep 2016 22:41:35 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id xy1si9812495wjc.198.2016.09.01.22.41.35; Thu, 01 Sep 2016 22:41:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DDC51A75AB; Fri, 2 Sep 2016 07:41:07 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id w9RtyQJEm0GU; Fri, 2 Sep 2016 07:41:07 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4AE844B979; Fri, 2 Sep 2016 07:40:56 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 52028A7581 for ; Fri, 2 Sep 2016 07:40:53 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bjchUsAGdY_P for ; Fri, 2 Sep 2016 07:40:53 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [198.47.19.12]) by theia.denx.de (Postfix) with ESMTPS id 20ED4A7573 for ; Fri, 2 Sep 2016 07:40:45 +0200 (CEST) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u825egPe002439; Fri, 2 Sep 2016 00:40:42 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u825egQY030955; Fri, 2 Sep 2016 00:40:42 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Fri, 2 Sep 2016 00:40:42 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u825egql023855; Fri, 2 Sep 2016 00:40:42 -0500 Received: from localhost (houapbldadm.hou.asp.ti.com [10.219.18.42]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u825ef315525; Fri, 2 Sep 2016 00:40:41 -0500 (CDT) From: Daniel Allred To: Date: Fri, 2 Sep 2016 00:40:24 -0500 Message-ID: <1472794824-6032-6-git-send-email-d-allred@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472794824-6032-1-git-send-email-d-allred@ti.com> References: <1472794824-6032-1-git-send-email-d-allred@ti.com> MIME-Version: 1.0 Cc: Tom Rini , Harinarayan Bhatta , Madan Srinivas , Andrew Davis , Daniel Allred Subject: [U-Boot] [PATCH 5/5] ARM: omap5: add fdt secure dram reservation fixup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adds a secure dram reservation fixup for secure devices, when a region in the emif has been set aside for secure world use. The size is defined by the CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE config option. Signed-off-by: Daniel Allred --- arch/arm/cpu/armv7/omap5/fdt.c | 64 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 62 insertions(+), 2 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/cpu/armv7/omap5/fdt.c b/arch/arm/cpu/armv7/omap5/fdt.c index 0493cd1..da8d59b 100644 --- a/arch/arm/cpu/armv7/omap5/fdt.c +++ b/arch/arm/cpu/armv7/omap5/fdt.c @@ -153,13 +153,73 @@ static int ft_hs_fixup_sram(void *fdt, bd_t *bd) static int ft_hs_fixup_sram(void *fdt, bd_t *bd) { return 0; } #endif +#if (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE != 0) +static int ft_hs_fixup_dram(void *fdt, bd_t *bd) +{ + const char *path, *subpath; + int offs; + u32 sec_mem_start = CONFIG_TI_SECURE_EMIF_REGION_START; + u32 sec_mem_size = CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE; + fdt64_t temp[2]; + + /* If start address is zero, place at end of DRAM */ + if (0 == sec_mem_start) + sec_mem_start = + (CONFIG_SYS_SDRAM_BASE + + (omap_sdram_size() - sec_mem_size)); + + /* Delete any original secure_reserved node */ + path = "/reserved-memory/secure_reserved"; + offs = fdt_path_offset(fdt, path); + if (offs >= 0) + fdt_del_node(fdt, offs); + + /* Add new secure_reserved node */ + path = "/reserved-memory"; + offs = fdt_path_offset(fdt, path); + if (offs < 0) { + debug("Node %s not found\n", path); + path = "/"; + subpath = "reserved-memory"; + fdt_path_offset(fdt, path); + offs = fdt_add_subnode(fdt, offs, subpath); + if (offs < 0) { + printf("Could not create %s%s node.\n", path, subpath); + return 1; + } + path = "/reserved-memory"; + offs = fdt_path_offset(fdt, path); + } + + subpath = "secure_reserved"; + offs = fdt_add_subnode(fdt, offs, subpath); + if (offs < 0) { + printf("Could not create %s%s node.\n", path, subpath); + return 1; + } + + temp[0] = cpu_to_fdt64(((u64)sec_mem_start)); + temp[1] = cpu_to_fdt64(((u64)sec_mem_size)); + fdt_setprop_string(fdt, offs, "compatible", + "ti,dra7-secure-memory"); + fdt_setprop_string(fdt, offs, "status", "okay"); + fdt_setprop(fdt, offs, "no-map", NULL, 0); + fdt_setprop(fdt, offs, "reg", temp, sizeof(temp)); + + return 0; +} +#else +static int ft_hs_fixup_dram(void *fdt, bd_t *bd) { return 0; } +#endif + static void ft_hs_fixups(void *fdt, bd_t *bd) { /* Check we are running on an HS/EMU device type */ if (GP_DEVICE != get_device_type()) { if ((ft_hs_fixup_crossbar(fdt, bd) == 0) && (ft_hs_disable_rng(fdt, bd) == 0) && - (ft_hs_fixup_sram(fdt, bd) == 0)) + (ft_hs_fixup_sram(fdt, bd) == 0) && + (ft_hs_fixup_dram(fdt, bd) == 0)) return; } else { printf("ERROR: Incorrect device type (GP) detected!"); @@ -171,7 +231,7 @@ static void ft_hs_fixups(void *fdt, bd_t *bd) static void ft_hs_fixups(void *fdt, bd_t *bd) { } -#endif +#endif /* #ifdef CONFIG_TI_SECURE_DEVICE */ /* * Place for general cpu/SoC FDT fixups. Board specific