From patchwork Fri Sep 2 05:40:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Allred, Daniel" X-Patchwork-Id: 75285 Delivered-To: patch@linaro.org Received: by 10.140.29.8 with SMTP id a8csp672052qga; Thu, 1 Sep 2016 22:41:23 -0700 (PDT) X-Received: by 10.28.30.1 with SMTP id e1mr1113058wme.77.1472794883651; Thu, 01 Sep 2016 22:41:23 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id h195si2326643wmg.66.2016.09.01.22.41.23; Thu, 01 Sep 2016 22:41:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 22BFCA7550; Fri, 2 Sep 2016 07:41:03 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id c9iGSjFiUEvO; Fri, 2 Sep 2016 07:41:03 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F3364A7599; Fri, 2 Sep 2016 07:40:52 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EA3F0A757B for ; Fri, 2 Sep 2016 07:40:47 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QwVLGwH0VbOc for ; Fri, 2 Sep 2016 07:40:47 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by theia.denx.de (Postfix) with ESMTPS id 2DEF8A754A for ; Fri, 2 Sep 2016 07:40:41 +0200 (CEST) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u825eegB024954; Fri, 2 Sep 2016 00:40:40 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u825edt2015719; Fri, 2 Sep 2016 00:40:39 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Fri, 2 Sep 2016 00:40:38 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u825ecoE006938; Fri, 2 Sep 2016 00:40:38 -0500 Received: from localhost (houapbldadm.hou.asp.ti.com [10.219.18.42]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u825ec315521; Fri, 2 Sep 2016 00:40:38 -0500 (CDT) From: Daniel Allred To: Date: Fri, 2 Sep 2016 00:40:23 -0500 Message-ID: <1472794824-6032-5-git-send-email-d-allred@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472794824-6032-1-git-send-email-d-allred@ti.com> References: <1472794824-6032-1-git-send-email-d-allred@ti.com> MIME-Version: 1.0 Cc: Tom Rini , Harinarayan Bhatta , Madan Srinivas , Andrew Davis , Daniel Allred Subject: [U-Boot] [PATCH 4/5] ti_omap5_common: mark region of DRAM protected on HS parts X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" If the ending portion of the DRAM is reserved for secure world use, then u-boot cannot use this memory for its relocation purposes. To prevent issues, we mark this memory as PRAM and this prevents it from being used by u-boot at all. Signed-off-by: Daniel Allred --- include/configs/ti_omap5_common.h | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index e42c88e..70fdc6e 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -146,6 +146,14 @@ */ #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ 0x1000 #define CONFIG_SPL_TEXT_BASE 0x40301350 +/* If no specific start address is specified then the secure EMIF + * region will be placed at the end of the DDR space. In order to prevent + * the main u-boot relocation from clobbering that memory and causing a + * firewall violation, we tell u-boot that memory is protected RAM (PRAM) + */ +#if (CONFIG_TI_SECURE_EMIF_REGION_START == 0) +#define CONFIG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10 +#endif #else /* * For all booting on GP parts, the flash loader image is