From patchwork Tue Jun 21 08:35:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ravi Babu X-Patchwork-Id: 70532 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp1899270qgy; Tue, 21 Jun 2016 01:35:58 -0700 (PDT) X-Received: by 10.194.34.202 with SMTP id b10mr19395388wjj.47.1466498158116; Tue, 21 Jun 2016 01:35:58 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id lq5si23658215wjb.151.2016.06.21.01.35.57; Tue, 21 Jun 2016 01:35:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6D98AA7679; Tue, 21 Jun 2016 10:35:57 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VfMHd-KIQTjl; Tue, 21 Jun 2016 10:35:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EA149A7577; Tue, 21 Jun 2016 10:35:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 98A8FA7577 for ; Tue, 21 Jun 2016 10:35:53 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IZ41RENr_aJ2 for ; Tue, 21 Jun 2016 10:35:53 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [198.47.19.11]) by theia.denx.de (Postfix) with ESMTPS id 216F2A74D0 for ; Tue, 21 Jun 2016 10:35:48 +0200 (CEST) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u5L8Zkup004043; Tue, 21 Jun 2016 03:35:46 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5L8ZkoD023397; Tue, 21 Jun 2016 03:35:46 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Tue, 21 Jun 2016 03:35:45 -0500 Received: from uda0393587.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5L8ZhRq032299; Tue, 21 Jun 2016 03:35:44 -0500 From: Ravi Babu To: Date: Tue, 21 Jun 2016 14:05:36 +0530 Message-ID: <1466498136-18478-1-git-send-email-ravibabu@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Cc: jteki@openedev.com, trini@konsulko.com, Praneeth Bajjuri Subject: [U-Boot] [PATCH] driver: qspi: correct QSPI disable CS reset value X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Praneeth Bajjuri Correcting QSPI disable/unselect CS reset value. CTRL_CORE_CONTROL_IO_2: QSPI_MEMMAPPED_CS[10:8] This is not causing any issue, but its better to untouch the reserved bits. Praneeth Bajjuri Signed-off-by: Ravi Babu --- drivers/spi/ti_qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.7.9.5 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index e69ec0d..9a372ad 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPI_XFER_DONE QSPI_WC #define MM_SWITCH 0x01 #define MEM_CS(cs) ((cs + 1) << 8) -#define MEM_CS_UNSELECT 0xfffff0ff +#define MEM_CS_UNSELECT 0xfffff8ff #define MMAP_START_ADDR_DRA 0x5c000000 #define MMAP_START_ADDR_AM43x 0x30000000 #define CORE_CTRL_IO 0x4a002558