From patchwork Tue May 24 12:14:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 68493 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp594721qge; Tue, 24 May 2016 05:13:57 -0700 (PDT) X-Received: by 10.28.24.82 with SMTP id 79mr23747532wmy.42.1464092037073; Tue, 24 May 2016 05:13:57 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id w15si23164480wmw.102.2016.05.24.05.13.56; Tue, 24 May 2016 05:13:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6013EA7644; Tue, 24 May 2016 14:13:46 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DBGfs97UsDWQ; Tue, 24 May 2016 14:13:46 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9474AA760C; Tue, 24 May 2016 14:13:36 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 88E26A75F2 for ; Tue, 24 May 2016 14:13:19 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fHYtQfaviPpV for ; Tue, 24 May 2016 14:13:19 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by theia.denx.de (Postfix) with ESMTPS id AAB9BA760B for ; Tue, 24 May 2016 14:13:13 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id u4OCCpS7028659; Tue, 24 May 2016 21:12:55 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com u4OCCpS7028659 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1464091975; bh=v9B4z3b3+HVDJIY0cnn9TrhrwQAyIDJc/zsGSXdzwgc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I+B/mgPxkWGpeIh0ORD7fupZqO2/lAqIJ+Q4gjGZ31Lcn6gTKUVhQhTBVqlPk6ggZ WJCyp5SYhqmgbipyUXugTvM8dNVo3ydBxT397cy+VuUWhK5y7DjqnyYu14kXsF3siQ 8AH+IFOgQ3fzuBgVPqPbRlXQZrAeORR2N/UfXkrZ83FJL/0feDZSG+KTtZ4++7+I4U tUMvCkP00kONYFj3cyIE3ISMkM8v/FRJ5mSOqb1qEXv3yimhQ0kGNNBAjV4qDfmhYi jGFcFOAQiToOJfaxiwi5gwMD26zRoPLaok1HaSp23h0A8kAY43cyO7YCESuOOzBYLm zJ/z6nPP20bzQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 24 May 2016 21:14:00 +0900 Message-Id: <1464092043-6346-5-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464092043-6346-1-git-send-email-yamada.masahiro@socionext.com> References: <1464092043-6346-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 4/7] ARM: uniphier: rename UMC macro names of PH1-LD20 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Correct some register names. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram/umc-ld20.c | 4 ++-- arch/arm/mach-uniphier/dram/umc64-regs.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c index 33cd487..186a398 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld20.c +++ b/arch/arm/mach-uniphier/dram/umc-ld20.c @@ -200,9 +200,9 @@ static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq, writel(umc_dataset[freq], dc_base + UMC_DATASET); writel(0x00400020, dc_base + UMC_DCCGCTL); - writel(0x00000003, dc_base + UMC_ACSCTLA); + writel(0x00000003, dc_base + UMC_ACSSETA); writel(0x00000103, dc_base + UMC_FLOWCTLG); - writel(0x00010200, dc_base + UMC_ACSSETA); + writel(0x00010200, dc_base + UMC_ACSSETB); writel(umc_flowctla[freq], dc_base + UMC_FLOWCTLA); writel(0x00004444, dc_base + UMC_FLOWCTLC); diff --git a/arch/arm/mach-uniphier/dram/umc64-regs.h b/arch/arm/mach-uniphier/dram/umc64-regs.h index 46e513c..1b6a838 100644 --- a/arch/arm/mach-uniphier/dram/umc64-regs.h +++ b/arch/arm/mach-uniphier/dram/umc64-regs.h @@ -23,8 +23,8 @@ #define UMC_SPCSETB_AREFMD_ARB (0x0) /* control by arbitor */ #define UMC_SPCSETB_AREFMD_CONT (0x1) /* control by DRAMCONT */ #define UMC_SPCSETB_AREFMD_REG (0x2) /* control by register */ -#define UMC_ACSCTLA 0x000000C0 -#define UMC_ACSSETA 0x000000C4 +#define UMC_ACSSETA 0x000000C0 +#define UMC_ACSSETB 0x000000C4 #define UMC_MEMCONF0A 0x00000200 #define UMC_MEMCONF0B 0x00000204 #define UMC_MEMCONFCH 0x00000240