From patchwork Tue May 24 12:13:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 68490 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp594454qge; Tue, 24 May 2016 05:13:22 -0700 (PDT) X-Received: by 10.194.115.39 with SMTP id jl7mr4459332wjb.81.1464092002686; Tue, 24 May 2016 05:13:22 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id fz8si3822232wjb.100.2016.05.24.05.13.22; Tue, 24 May 2016 05:13:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3572AA75F0; Tue, 24 May 2016 14:13:18 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AxtC_QST-JYm; Tue, 24 May 2016 14:13:18 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8FF3AA7609; Tue, 24 May 2016 14:13:13 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A234BA74EE for ; Tue, 24 May 2016 14:13:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mgurBufitYZz for ; Tue, 24 May 2016 14:13:04 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by theia.denx.de (Postfix) with ESMTPS id EBF27A74FB for ; Tue, 24 May 2016 14:12:58 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id u4OCCpS4028659; Tue, 24 May 2016 21:12:52 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com u4OCCpS4028659 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1464091973; bh=Aoa/DCIbEM2pEe1vRC+I2+gP+8PqfpZg7hI2H/YRDbs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KbQOzttCxqTkyeiw3bYsOhJjbWWfDOMTMk1VYlOaToFWUPFoAc8p0fUIJqgAytoYp UpQDn8IVOk/jZqbMAqe6Ef4CldPNuanOw63XAJC68WxlyzTMowEO1fknr+w7o6joOT +zXV60Ee098u7gZfcBG0Luhg0nBLlFrMOROKF2Rl8yPAZhTj9pA5R8gUYuLVSrH71+ Nz67EsHXhDPu+K9deiUfJH06vLijGDYZlkxJPcQslP5bxEJ3R4+XGwQSg3QaPkJ9wV 70kfGCaVoPjRSAevBcfzFJaGJ+zGhKbYOf0kdRoOa22uXUGNXn2+UD7o9FoXysqkqk qfjpscsMV7fcA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 24 May 2016 21:13:57 +0900 Message-Id: <1464092043-6346-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464092043-6346-1-git-send-email-yamada.masahiro@socionext.com> References: <1464092043-6346-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 1/7] ARM: uniphier: disable cache in SPL of PH1-LD20 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/init/init-ld20.c | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c index 660ad45..7f66053 100644 --- a/arch/arm/mach-uniphier/init/init-ld20.c +++ b/arch/arm/mach-uniphier/init/init-ld20.c @@ -51,5 +51,7 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd) led_puts("L5"); + dcache_disable(); + return 0; }