From patchwork Fri May 20 00:10:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Allred, Daniel" X-Patchwork-Id: 68210 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp3482958qge; Thu, 19 May 2016 17:12:18 -0700 (PDT) X-Received: by 10.194.243.231 with SMTP id xb7mr107816wjc.33.1463703138200; Thu, 19 May 2016 17:12:18 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id k203si2762338wmd.110.2016.05.19.17.12.17; Thu, 19 May 2016 17:12:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 43FBBB37F9; Fri, 20 May 2016 02:11:53 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2q6KyV53uHYQ; Fri, 20 May 2016 02:11:53 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 637F0B37FD; Fri, 20 May 2016 02:11:51 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BE647A75F8 for ; Fri, 20 May 2016 02:11:45 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Bjeqfacwr8Am for ; Fri, 20 May 2016 02:11:45 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by theia.denx.de (Postfix) with ESMTPS id 7D31AA75CA for ; Fri, 20 May 2016 02:11:31 +0200 (CEST) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u4K0BTHm026525; Thu, 19 May 2016 19:11:29 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4K0BT0m019432; Thu, 19 May 2016 19:11:29 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Thu, 19 May 2016 19:11:29 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4K0BTjI022052; Thu, 19 May 2016 19:11:29 -0500 Received: from localhost (houapbldadm.hou.asp.ti.com [10.219.18.42]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u4K0BT310326; Thu, 19 May 2016 19:11:29 -0500 (CDT) From: Daniel Allred To: Date: Thu, 19 May 2016 19:10:52 -0500 Message-ID: <1463703055-17484-13-git-send-email-d-allred@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463703055-17484-1-git-send-email-d-allred@ti.com> References: <1463703055-17484-1-git-send-email-d-allred@ti.com> MIME-Version: 1.0 Cc: Tom Rini , Madan Srinivas , Daniel Allred Subject: [U-Boot] [PATCH v3 12/15] ARM: omap-common: Add device type to CPU string X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update the CPU string output so that the device type is now included as part of the CPU string that is printed as the SPL or u-boot comes up. This update adds a suffix of the form "-GP" or "-HS" for production devices, so that general purpose (GP) and high security (HS) can be distiguished. Applies to all OMAP5 variants. Signed-off-by: Daniel Allred Signed-off-by: Madan Srinivas Reviewed-by: Tom Rini --- V3: Rebase on current master V2: Move device type defines to omap_common.h, remove duplicates arch/arm/cpu/armv7/omap-common/hwinit-common.c | 22 ++++++++++++++++++++-- arch/arm/include/asm/arch-omap3/cpu.h | 7 +------ arch/arm/include/asm/omap_common.h | 11 +++++++++++ 3 files changed, 32 insertions(+), 8 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index 01c2d57..078bdd8 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -65,12 +65,30 @@ static void omap_rev_string(void) u32 major_rev = (omap_rev & 0x00000F00) >> 8; u32 minor_rev = (omap_rev & 0x000000F0) >> 4; + const char *sec_s; + + switch (get_device_type()) { + case TST_DEVICE: + sec_s = "TST"; + break; + case EMU_DEVICE: + sec_s = "EMU"; + break; + case HS_DEVICE: + sec_s = "HS"; + break; + case GP_DEVICE: + sec_s = "GP"; + break; + default: + sec_s = "?"; + } + if (soc_variant) printf("OMAP"); else printf("DRA"); - printf("%x ES%x.%x\n", omap_variant, major_rev, - minor_rev); + printf("%x-%s ES%x.%x\n", omap_variant, sec_s, major_rev, minor_rev); } #ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h index 53cc2b0..e8aa786 100644 --- a/arch/arm/include/asm/arch-omap3/cpu.h +++ b/arch/arm/include/asm/arch-omap3/cpu.h @@ -59,13 +59,8 @@ struct ctrl_id { #endif /* __ASSEMBLY__ */ #endif /* __KERNEL_STRICT_NAMES */ -/* device type */ -#define DEVICE_MASK (0x7 << 8) +/* boot pin mask */ #define SYSBOOT_MASK 0x1F -#define TST_DEVICE 0x0 -#define EMU_DEVICE 0x1 -#define HS_DEVICE 0x2 -#define GP_DEVICE 0x3 /* device speed */ #define SKUID_CLK_MASK 0xf diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 8fb05e1..ac34b0e 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -717,6 +717,17 @@ static inline u8 is_dra72x(void) #define DRA722_ES2_0 0x07220200 /* + * silicon device type + * Moving to common from cpu.h, since it is shared by various omap devices + */ +#define DEVICE_MASK (BIT(8) | BIT(9) | BIT(10)) +#define TST_DEVICE 0x0 +#define EMU_DEVICE 0x1 +#define HS_DEVICE 0x2 +#define GP_DEVICE 0x3 + + +/* * SRAM scratch space entries */ #define OMAP_SRAM_SCRATCH_OMAP_REV SRAM_SCRATCH_SPACE_ADDR