From patchwork Mon Apr 11 23:37:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Allred, Daniel" X-Patchwork-Id: 65578 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp1651734qge; Mon, 11 Apr 2016 18:20:00 -0700 (PDT) X-Received: by 10.28.109.87 with SMTP id i84mr912432wmc.3.1460424000490; Mon, 11 Apr 2016 18:20:00 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id w7si31591589wjq.212.2016.04.11.18.20.00; Mon, 11 Apr 2016 18:20:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AECBBA76CA; Tue, 12 Apr 2016 03:19:02 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LASAAIatGkqr; Tue, 12 Apr 2016 03:19:02 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4C065A76CD; Tue, 12 Apr 2016 03:18:20 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 83CEAA74A8 for ; Tue, 12 Apr 2016 01:37:49 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xs302rnZiM70 for ; Tue, 12 Apr 2016 01:37:49 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by theia.denx.de (Postfix) with ESMTPS id 1436FA748A for ; Tue, 12 Apr 2016 01:37:48 +0200 (CEST) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u3BNblrV021761; Mon, 11 Apr 2016 18:37:47 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3BNblJM007977; Mon, 11 Apr 2016 18:37:47 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Mon, 11 Apr 2016 18:37:46 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3BNblrQ018958; Mon, 11 Apr 2016 18:37:47 -0500 Received: from localhost (houapbldadm.hou.asp.ti.com [10.219.18.42]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u3BNbk900475; Mon, 11 Apr 2016 18:37:46 -0500 (CDT) From: Daniel Allred To: Date: Mon, 11 Apr 2016 18:37:12 -0500 Message-ID: <1460417838-22343-11-git-send-email-d-allred@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1460417838-22343-1-git-send-email-d-allred@ti.com> References: <1460417838-22343-1-git-send-email-d-allred@ti.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 12 Apr 2016 03:17:51 +0200 Cc: Tom Rini , Madan Srinivas , Daniel Allred Subject: [U-Boot] [PATCH 10/16] ti_omap5_common: Update SPL start address on secure parts X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Updated the CONFIG_SPL_TEXT_BASE to support secure parts (moving the start address past secure reserved memory and the size of the security certificate that precedes the boot image on secure devices). Updated the related CONFIG_SPL_MAX_SIZE to properly reflect the internal memory actually available on the various device flavors (Common minimum internal RAM guaranteed for various flavors of DRA7xx/AM57xx is 512KB). Signed-off-by: Daniel Allred Signed-off-by: Madan Srinivas --- include/configs/ti_omap5_common.h | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Tested-by: Andreas Dannenberg diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 202b18c..b2d4a0b 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -132,13 +132,35 @@ /* * SPL related defines. The Public RAM memory map the ROM defines the - * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 - * (dra7xx is larger, but we do not need to be larger at this time). We - * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and + * area between 0x40300000 and 0x4031E000 as a download area for OMAP5. + * On DRA7xx/AM57XX the download area is between 0x40300000 and 0x4037E000. + * We set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and * print some information. */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) +#ifdef CONFIG_TI_SECURE_DEVICE +/* + * For memory booting on HS parts, the first 4KB of the internal RAM is + * reserved for secure world use and the flash loader image is + * preceded by a secure certificate. The SPL will therefore run in internal + * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)). + */ +#define CONFIG_SECURE_BOOT_SRAM 0x1000 +#define CONFIG_SPL_TEXT_BASE 0x40301350 +#else +/* + * For all booting on GP parts, the flash loader image is + * downloaded into internal RAM at address 0x40300000. + */ +#define CONFIG_SPL_TEXT_BASE 0x40300000 +#endif + +/* DRA7xx/AM57xx have 512K of SRAM, OMAP5 only 128K */ +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) +#define CONFIG_SPL_BOOT_END 0x4037E000 +#else +#define CONFIG_SPL_BOOT_END 0x4031E000 +#endif +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_BOOT_END - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_DISPLAY_PRINT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \