From patchwork Wed Apr 6 11:37:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 65162 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp996088lbc; Wed, 6 Apr 2016 04:38:19 -0700 (PDT) X-Received: by 10.194.78.83 with SMTP id z19mr21434700wjw.5.1459942698945; Wed, 06 Apr 2016 04:38:18 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id uo3si2771868wjc.114.2016.04.06.04.38.18; Wed, 06 Apr 2016 04:38:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B983CA76E4; Wed, 6 Apr 2016 13:38:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OTqZYwJ7tpnY; Wed, 6 Apr 2016 13:38:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C26FFA76EF; Wed, 6 Apr 2016 13:38:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7FD95A75BF for ; Wed, 6 Apr 2016 13:38:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BPpqjOKgT6fm for ; Wed, 6 Apr 2016 13:38:04 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by theia.denx.de (Postfix) with ESMTPS id 0FA85A74C3 for ; Wed, 6 Apr 2016 13:38:01 +0200 (CEST) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u36BbxN7032440; Wed, 6 Apr 2016 06:37:59 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u36BbwkA017920; Wed, 6 Apr 2016 06:37:58 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Wed, 6 Apr 2016 06:37:58 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u36Bbw40006375; Wed, 6 Apr 2016 06:37:58 -0500 Received: from localhost (a0272616local.am.dhcp.ti.com [172.22.173.195]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u36Bbw906632; Wed, 6 Apr 2016 06:37:58 -0500 (CDT) From: Dan Murphy To: Date: Wed, 6 Apr 2016 06:37:59 -0500 Message-ID: <1459942680-18696-1-git-send-email-dmurphy@ti.com> X-Mailer: git-send-email 2.7.2.333.g70bd996 MIME-Version: 1.0 Cc: edgar.iglesias@xilinx.com, trini@konsulko.com, michal.simek@xilinx.com Subject: [U-Boot] [uboot][PATCH v3 1/2] net: phy: dp83867: Add device tree bindings and documentation X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver. The original document was from: [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel] Signed-off-by: Dan Murphy --- v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/ doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++ include/dt-bindings/net/ti-dp83867.h | 35 +++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+) create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt create mode 100644 include/dt-bindings/net/ti-dp83867.h -- 2.8.0.rc3 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt new file mode 100644 index 0000000..0ec009c --- /dev/null +++ b/doc/device-tree-bindings/net/ti,dp83867.txt @@ -0,0 +1,29 @@ +* Texas Instruments - dp83867 Giga bit ethernet phy + +Required properties: + - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h + for applicable values + - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h + for applicable values + - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h + for applicable values + +Default child nodes are standard Ethernet PHY device +nodes as described in doc/devicetree/bindings/net/ethernet.txt + +Example: + +&mac { + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; + status = "okay"; + + ti,rx_internal_delay = ; + ti,tx_internal_delay = ; + ti,fifo_depth = ; + +}; + + +Datasheet can be found: +http://www.ti.com/product/DP83867IR/datasheet diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h new file mode 100644 index 0000000..5c592fb --- /dev/null +++ b/include/dt-bindings/net/ti-dp83867.h @@ -0,0 +1,35 @@ +/* + * TI DP83867 PHY drivers + * + * SPDX-License-Identifier: GPL-2.0 + * + */ + +#ifndef _DT_BINDINGS_TI_DP83867_H +#define _DT_BINDINGS_TI_DP83867_H + +/* PHY CTRL bits */ +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB 0x00 +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB 0x01 +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB 0x02 +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB 0x03 + +/* RGMIIDCTL internal delay for rx and tx */ +#define DP83867_RGMIIDCTL_250_PS 0x0 +#define DP83867_RGMIIDCTL_500_PS 0x1 +#define DP83867_RGMIIDCTL_750_PS 0x2 +#define DP83867_RGMIIDCTL_1_NS 0x3 +#define DP83867_RGMIIDCTL_1_25_NS 0x4 +#define DP83867_RGMIIDCTL_1_50_NS 0x5 +#define DP83867_RGMIIDCTL_1_75_NS 0x6 +#define DP83867_RGMIIDCTL_2_00_NS 0x7 +#define DP83867_RGMIIDCTL_2_25_NS 0x8 +#define DP83867_RGMIIDCTL_2_50_NS 0x9 +#define DP83867_RGMIIDCTL_2_75_NS 0xa +#define DP83867_RGMIIDCTL_3_00_NS 0xb +#define DP83867_RGMIIDCTL_3_25_NS 0xc +#define DP83867_RGMIIDCTL_3_50_NS 0xd +#define DP83867_RGMIIDCTL_3_75_NS 0xe +#define DP83867_RGMIIDCTL_4_00_NS 0xf + +#endif