From patchwork Tue Mar 29 11:18:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 64587 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp1945242lbc; Tue, 29 Mar 2016 04:18:17 -0700 (PDT) X-Received: by 10.28.87.139 with SMTP id l133mr2460571wmb.38.1459250297052; Tue, 29 Mar 2016 04:18:17 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id ew3si33679338wjd.140.2016.03.29.04.18.16; Tue, 29 Mar 2016 04:18:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4A9F0A7675; Tue, 29 Mar 2016 13:18:16 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id G1MeHgo45JY2; Tue, 29 Mar 2016 13:18:16 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E4D9DA7666; Tue, 29 Mar 2016 13:18:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BFB13A7666 for ; Tue, 29 Mar 2016 13:18:13 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KPcVxqh4cyNp for ; Tue, 29 Mar 2016 13:18:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg010-v.nifty.com (conuserg010.nifty.com [202.248.44.36]) by theia.denx.de (Postfix) with ESMTPS id 12769A7661 for ; Tue, 29 Mar 2016 13:18:08 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg010-v.nifty.com with ESMTP id u2TBHnku016845; Tue, 29 Mar 2016 20:17:50 +0900 X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 29 Mar 2016 20:18:45 +0900 Message-Id: <1459250325-29021-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 Subject: [U-Boot] [PATCH] ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Currently, these functions assume #address-cells and #size-cells are both one. Fix them to support 64bit DTB. Also, I am fixing a buffer overrun bug while I am here. The array size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS. The number of iteration in the loop should be limited by that CONFIG. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram_init.c | 45 +++++++++++++++++++++++++++++--------- 1 file changed, 35 insertions(+), 10 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index cffdfc9..815f243 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -23,14 +23,25 @@ static const void *get_memory_reg_prop(const void *fdt, int *lenp) int dram_init(void) { + const void *fdt = gd->fdt_blob; const fdt32_t *val; - int len; + int ac, sc, len; - val = get_memory_reg_prop(gd->fdt_blob, &len); - if (len < sizeof(*val)) + ac = fdt_address_cells(fdt, 0); + sc = fdt_size_cells(fdt, 0); + if (ac < 0 || sc < 1 || sc > 2) { + printf("invalid address/size cells\n"); return -EINVAL; + } + + val = get_memory_reg_prop(fdt, &len); + if (len / sizeof(*val) < ac + sc) + return -EINVAL; + + val += ac; - gd->ram_size = fdt32_to_cpu(*(val + 1)); + gd->ram_size = sc == 2 ? fdt64_to_cpu(*(fdt64_t *)val) : + fdt32_to_cpu(*val); debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size); @@ -39,19 +50,33 @@ int dram_init(void) void dram_init_banksize(void) { + const void *fdt = gd->fdt_blob; const fdt32_t *val; - int len, i; + int ac, sc, cells, len, i; - val = get_memory_reg_prop(gd->fdt_blob, &len); + val = get_memory_reg_prop(fdt, &len); if (len < 0) return; + ac = fdt_address_cells(fdt, 0); + sc = fdt_size_cells(fdt, 0); + if (ac < 1 || sc > 2 || sc < 1 || sc > 2) { + printf("invalid address/size cells\n"); + return; + } + + cells = ac + sc; + len /= sizeof(*val); - len /= 2; - for (i = 0; i < len; i++) { - gd->bd->bi_dram[i].start = fdt32_to_cpu(*val++); - gd->bd->bi_dram[i].size = fdt32_to_cpu(*val++); + for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells; + i++, len -= cells) { + gd->bd->bi_dram[i].start = ac == 2 ? + fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val); + val += ac; + gd->bd->bi_dram[i].size = sc == 2 ? + fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val); + val += sc; debug("DRAM bank %d: start = %08lx, size = %08lx\n", i, (unsigned long)gd->bd->bi_dram[i].start,